PIC10F320 View Datasheet(PDF) - Microchip Technology

Part Name

Description

MFG CO.

PIC10F320

6/8-Pin Flash-Based, 8-Bit Microcontrollers

Microchip Technology 

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PIC10(L)F320/322

TABLE 2-3: SPECIAL FUNCTION REGISTER SUMMARY (BANK 0) (CONTINUED)

Address

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on Value on all

POR, BOR other resets

Bank 0 (Continued)

20h

PMADRL

21h

PMADRH

22h

PMDATL

23h

PMDATH

24h

PMCON1

25h

PMCON2

26h

CLKRCON

27h

NCO1ACCL

28h

NCO1ACCH

29h

NCO1ACCU

PMADR<7:0>

0000 0000 0000 0000

—

—

—

—

—

—

—

PMADR8 ---- ---0 ---- ---0

PMDAT<7:0>

xxxx xxxx uuuu uuuu

—

—

PMDAT<13:8>

--xx xxxx --uu uuuu

—

CFGS

LWLO

FREE

WRERR

WREN

WR

RD

1000 0000 1000 q000

Program Memory Control Register 2 (not a physical register)

0000 0000 0000 0000

—

CLKROE

—

—

—

—

—

—

-0-- ---- -0-- ----

NCO1 Accumulator <7:0>

0000 0000 0000 0000

NCO1 Accumulator <15:8>

0000 0000 0000 0000

—

NCO1 Accumulator <19..16>

---- 0000 ---- 0000

2Ah

NCO1INCL

2Bh

NCO1INCH

2Ch

—

Unimplemented

NCO1 Increment <7:0>

NCO1 Increment <15:8>

0000 0001 0000 0001

0000 0000 0000 0000

—

—

2Dh

NCO1CON

N1EN

N1OE

N1OUT N1POL

—

—

2Eh

NCO1CLK

N1PWS<2:0>

—

—

—

2Fh

Reserved

Reserved

30h

WDTCON

—

—

WDTPS<4:0>

—

N1PFM

N1CKS<1:0>

SWDTEN

0000 ---0 00x0 ---0

000- --00 000- --00

xxxx xxxx uuuu uuuu

--01 0110 --01 0110

31h

CLC1CON

LC1EN LC1OE LC1OUT LC1INTP LC1INTN

LC1MODE<2:0>

00x0 -000 00x0 -000

32h

CLC1SEL0

—

LC1D2S<2:0>

—

LC1D1S<2:0>

-xxx -xxx -uuu -uuu

33h

CLC1SEL1

—

LC1D4S<2:0>

—

LC1D3S<2:0>

-xxx -xxx -uuu -uuu

34h

CLC1POL

LC1POL

—

—

—

LC1G4POL LC1G3POL LC1G2POL LC1G1POL 0--- xxxx 0--- uuuu

35h

CLC1GLS0 LC1G1D4T LC1G1D4N LC1G1D3T LC1G1D3N LC1G1D2T LC1G1D2N LC1G1D1T LC1G1D1N xxxx xxxx uuuu uuuu

36h

CLC1GLS1 LC1G2D4T LC1G2D4N LC1G2D3T LC1G2D3N LC1G2D2T LC1G2D2N LC1G2D1T LC1G2D1N xxxx xxxx uuuu uuuu

37h

CLC1GLS2 LC1G3D4T LC1G3D4N LC1G3D3T LC1G3D3N LC1G3D2T LC1G3D2N LC1G3D1T LC1G3D1N xxxx xxxx uuuu uuuu

38h

CLC1GLS3 LC1G4D4T LC1G4D4N LC1G4D3T LC1G4D3N LC1G4D2T LC1G4D2N LC1G4D1T LC1G4D1N xxxx xxxx uuuu uuuu

39h

CWG1CON0

G1EN

G1OEB G1OEA G1POLB G1POLA

—

—

G1CS0 0000 0--0 0000 0--0

3Ah

CWG1CON1

G1ASDLB<1:0>

G1ASDLA<1:0>

—

—

G1IS<1:0>

xxxx --xx uuuu --uu

3Bh

CWG1CON2

G1ASE G1ARSEN

—

—

3Ch

CWG1DBR

—

—

3Dh

CWG1DBF

—

—

—

—

CWG1DBR<5:0>

CWG1DBF<5:0>

G1ASDCLC1 G1ASDFLT xx-- --xx uu-- --uu

--xx xxxx --uu uuuu

--xx xxxx --uu uuuu

3Eh

VREGCON

—

—

—

—

—

—

VREGPM1 Reserved ---- --01 ---- --01

3Fh

BORCON

SBOREN BORFS

—

—

—

—

—

BORRDY 10-- ---q uu-- ---u

Legend:

x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved.

Shaded locations are unimplemented, read as ‘0’.

Note 1: Unimplemented, read as ‘1’.

DS40001585D-page 16

 2011-2015 Microchip Technology Inc.

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