PIC10(L)F320/322
REGISTER 9-6: PMCON2: PROGRAM MEMORY CONTROL 2 REGISTER
W-0/0
bit 7
W-0/0
W-0/0
W-0/0
W-0/0
W-0/0
Program Memory Control Register 2
W-0/0
W-0/0
bit 0
Legend:
R = Readable bit
S = Bit can only be set
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-0
Flash Memory Unlock Pattern bits
To unlock writes, a 55h must be written first, followed by an AAh, before setting the WR bit of the
PMCON1 register. The value written to this register is used to unlock the writes. There are specific
timing requirements on these writes.
TABLE 9-3: SUMMARY OF REGISTERS ASSOCIATED WITH FLASH PROGRAM MEMORY
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register on
Page
INTCON
GIE
PEIE
TMR0IE
INTE
IOCIE
TMR0IF
INTF
IOCIF
40
PMCON1
—
CFGS
LWLO
FREE
WRERR WREN
WR
RD
65
PMCON2
Program Memory Control Register 2
66
PMADRL
PMADR<7:0>
64
PMADRH
—
—
—
—
—
—
—
PMADR8
64
PMDATL
PMDAT<7:0>
63
PMDATH
—
—
PMDAT<13:8>
63
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used by Flash program memory module.
TABLE 9-4: SUMMARY OF CONFIGURATION WORD WITH FLASH PROGRAM MEMORY
Name Bits Bit -/7
Bit -/6
Bit 13/5
Bit 12/4
Bit 11/3
Bit 10/2
Bit 9/1
Bit 8/0
Register
on Page
13:8
—
CONFIG
7:0
CP
—
MCLR
—
PWRTE
WRT<1:0>
WDTE<1:0>
BORV
LPBOR
LVP
20
BOREN<1:0>
FOSC
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used by Flash program memory.
DS40001585D-page 66
2011-2015 Microchip Technology Inc.