PIC10(L)F320/322
4.4 Register Definitions: Reference Clock Control
REGISTER 4-1: CLKRCON – REFERENCE CLOCK CONTROL REGISTER
U-0
R/W-0/0
U-0
U-0
U-0
U-0
U-0
—
CLKROE
—
—
—
—
—
bit 7
U-0
—
bit 0
Legend:
R = Readable bit
W = Writable bit
-n = Value at POR
‘1’ = Bit is set
q = Value depends on condition
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
bit 6
bit 5-0
Unimplemented: Read as ‘0’
CLKROE: Reference Clock Output Enable bit
1 = Reference Clock output (CLKR), regardless of TRIS
0 = Reference Clock output disabled
Unimplemented: Read as ‘0’
4.5 Register Definitions: Oscillator Control
REGISTER 4-2: OSCCON: OSCILLATOR CONTROL REGISTER
U-0
—
bit 7
R/W-1/1
R/W-1/1
R/W-0/0
R-0/0
U-0
IRCF<2:0>
HFIOFR
—
R-0/0
LFIOFR
R-0/0
HFIOFS
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
q = Value depends on condition
bit 7
bit 6-4
bit 3
bit 2
bit 1
bit 0
Unimplemented: Read as ‘0’
IRCF<2:0>: INTOSC (FOSC) Frequency Select bits
111 = 16 MHz
110 = 8 MHz (default value)
101 = 4 MHz
100 = 2 MHz
011 = 1 MHz
010 = 500 kHz
001 = 250 kHz
000 = 31 kHz (LFINTOSC)
HFIOFR: High-Frequency Internal Oscillator Ready bit
1 = 16 MHz Internal Oscillator (HFINTOSC) is ready
0 = 16 MHz Internal Oscillator (HFINTOSC) is not ready
Unimplemented: Read as ‘0’
LFIOFR: Low-Frequency Internal Oscillator Ready bit
1 = 31 kHz Internal Oscillator (LFINTOSC) is ready
0 = 31 kHz Internal Oscillator (LFINTOSC) is not ready
HFIOFS: High-Frequency Internal Oscillator Stable bit
1 = 16 MHz Internal Oscillator (HFINTOSC) is stable
0 = 16 MHz Internal Oscillator (HFINTOSC) is not stable
DS40001585D-page 26
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