PIC10LF320 View Datasheet(PDF) - Microchip Technology
Part Name
Description
MFG CO.
'PIC10LF320' PDF : 210 Pages View PDF
PIC10(L)F320/322
REGISTER 6-2: PIE1: PERIPHERAL INTERRUPT ENABLE REGISTER 1
U-0
—
bit 7
R/W-0/0
U-0
R/W-0/0
R/W-0/0
U-0
ADIE
—
NCO1IE
CLC1IE
—
R/W-0/0
TMR2IE
U-0
—
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7
Unimplemented: Read as ‘0’
bit 6
ADIE: A/D Converter Interrupt Enable bit
1 = Enables the A/D converter interrupt
0 = Disables the A/D converter interrupt
bit 5
Unimplemented: Read as ‘0’
bit 4
NCO1IE: Numerically Controlled Oscillator Interrupt Enable bit
1 = Enables the NCO overflow interrupt
0 = Disables the NCO overflow interrupt
bit 3
CLC1IE: Configurable Logic Block Interrupt Enable bit
1 = Enables the CLC interrupt
0 = Disables the CLC interrupt
bit 2
Unimplemented: Read as ‘0’
bit 1
TMR2IE: TMR2 to PR2 Match Interrupt Enable bit
1 = Enables the TMR2 to PR2 Match interrupt
0 = Disables the TMR2 to PR2 Match interrupt
bit 0
Unimplemented: Read as ‘0’
Note: Bit PEIE of the INTCON register must be
set to enable any peripheral interrupt.
2011-2015 Microchip Technology Inc.
DS40001585D-page 41
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