PIC10LF320 View Datasheet(PDF) - Microchip Technology
Part Name
Description
MFG CO.
'PIC10LF320' PDF : 210 Pages View PDF
PIC10(L)F320/322
TABLE 15-1: ADC CLOCK PERIOD (TAD) VS. DEVICE OPERATING FREQUENCIES
ADC Clock Period (TAD)
Device Frequency (FOSC)
ADC
Clock Source
ADCS<2:0>
16 MHz
8 MHz
4 MHz
1 MHz
FOSC/2
000
125 ns(1)
250 ns(1)
500 ns(1)
2.0 s
FOSC/4
100
250 ns(1)
500 ns(1)
1.0 s
4.0 s
FOSC/8
001
0.5 s(1)
1.0 s
2.0 s
8.0 s(2)
FOSC/16
101
1.0 s
2.0 s
4.0 s
16.0 s(2)
FOSC/32
010
2.0 s
4.0 s
8.0 s(2)
32.0 s(2)
FOSC/64
110
4.0 s
8.0 s(2)
16.0 s(2)
64.0 s(2)
FRC
x11
1.0-6.0 s(1,3)
1.0-6.0 s(1,3)
1.0-6.0 s(1,3)
1.0-6.0 s(1,3)
Legend:
Note 1:
2:
3:
Shaded cells are outside of recommended range.
These values violate the minimum required TAD time.
For faster conversion times, the selection of another clock source is recommended.
The ADC clock period (TAD) and total ADC conversion time can be minimized when the ADC clock is derived from the
system clock FOSC. However, the FRC clock source must be used when conversions are to be performed with the
device in Sleep mode.
FIGURE 15-2:
ANALOG-TO-DIGITAL CONVERSION TAD CYCLES
TCY - TAD TAD1 TAD2 TAD3 TAD4 TAD5 TAD6 TAD7 TAD8 TAD9
b7 b6 b5 b4 b3 b2 b1 b0
Conversion starts
Holding capacitor is disconnected from analog input
(typically 100 ns)
Set GO bit
On the following cycle:
ADRES is loaded, GO bit is cleared,
ADIF bit is set, holding capacitor is
connected to analog input.
2011-2015 Microchip Technology Inc.
DS40001585D-page 85
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