PIC12(L)F1840
TABLE 16-3: SUMMARY OF REGISTERS ASSOCIATED WITH ADC
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
ADCON0
—
CHS<4:0>
GO/DONE ADON
ADCON1
ADFM
ADCS<2:0>
—
—
ADPREF<1:0>
ADRESH
ADC Result Register High
ADRESL
ADC Result Register Low
ANSELA
—
—
—
ANSA4
—
ANSA2 ANSA1 ANSA0
CCP1CON
P1M<1:0>
DC1B<1:0>
CCP1M<3:0>
DACCON0
DACEN DACLPS DACOE
—
DACPSS<1:0>
—
—
DACCON1
—
—
—
DACR<4:0>
FVRCON
FVREN FVRRDY TSEN TSRNG
CDAFVR<1:0>
ADFVR<1:0>
INTCON
GIE
PEIE
TMR0IE
INTE
IOCE
TMR0IF
INTF
IOCF
PIE1
TMR1GIE ADIE
RCIE
TXIE
SSP1IE CCP1IE TMR2IE TMR1IE
PIR1
TMR1GIF ADIF
RCIF
TXIF
SSP1IF CCP1IF TMR2IF TMR1IF
TRISA
—
—
TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0
Legend: — = unimplemented read as ‘0’. Shaded cells are not used for ADC module.
Register
on Page
125
126
127, 128
127, 128
106
197
136
136
115
74
75
77
105
2011-2012 Microchip Technology Inc.
DS41441C-page 131