PIC12(L)F1840
TABLE 3-6: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Address Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on all
other
Resets
Banks 8-30
x0Ch/ —
x8Ch
—
x1Fh/
x9Fh
Unimplemented
Bank 31
F8Ch —
—
FE3h
Unimplemented
FE4h STATUS_
—
—
—
—
—
Z_SHAD DC_SHAD
SHAD
FE5h WREG_
Working Register Shadow
SHAD
FE6h BSR_
—
—
—
Bank Select Register Shadow
SHAD
FE7h PCLATH_
—
Program Counter Latch High Register Shadow
SHAD
FE8h FSR0L_
Indirect Data Memory Address 0 Low Pointer Shadow
SHAD
FE9h FSR0H_
Indirect Data Memory Address 0 High Pointer Shadow
SHAD
FEAh FSR1L_
Indirect Data Memory Address 1 Low Pointer Shadow
SHAD
FEBh FSR1H_
Indirect Data Memory Address 1 High Pointer Shadow
SHAD
FECh —
Unimplemented
FEDh STKPTR
—
—
—
Current Stack Pointer
FEEh TOSL
Top-of-Stack Low byte
FEFh TOSH
—
Top-of-Stack High byte
Legend:
Note 1:
2:
3:
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
These registers can be addressed from any bank.
PIC12F1840 only.
Unimplemented, read as ‘1’.
C_SHAD
—
—
—
—
---- -xxx ---- -uuu
0000 0000 uuuu uuuu
---x xxxx ---u uuuu
-xxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
—
—
---1 1111 ---1 1111
xxxx xxxx uuuu uuuu
-xxx xxxx -uuu uuuu
2011-2012 Microchip Technology Inc.
DS41441C-page 25