PIC12(L)F1840
REGISTER 4-2:
CONFIG2: CONFIGURATION WORD 2
R/P-1
R/P-1
U-1
LVP(1)
DEBUG(2)
—
bit 13
R/P-1
BORV
R/P-1
STVREN
R/P-1
PLLEN
bit 8
U-1
U-1
R-1
U-1
U-1
U-1
R/P-1
R/P-1
—
—
Reserved
—
—
—
WRT<1:0>
bit 7
bit 0
Legend:
R = Readable bit
‘0’ = Bit is cleared
P = Programmable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘1’
-n = Value when blank or after Bulk Erase
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
bit 7-5
bit 4
bit 3-2
bit 1-0
LVP: Low-Voltage Programming Enable bit(1)
1 = Low-voltage programming enabled
0 = High-voltage on MCLR must be used for programming
DEBUG: In-Circuit Debugger Mode bit(2)
1 = In-Circuit Debugger disabled, ICSPCLK and ICSPDAT are general purpose I/O pins
0 = In-Circuit Debugger enabled, ICSPCLK and ICSPDAT are dedicated to the debugger
Unimplemented: Read as ‘1’
BORV: Brown-out Reset Voltage Selection bit(3)
1 = Brown-out Reset voltage (Vbor), low trip point selected.
0 = Brown-out Reset voltage (Vbor), high trip point selected.
STVREN: Stack Overflow/Underflow Reset Enable bit
1 = Stack Overflow or Underflow will cause a Reset
0 = Stack Overflow or Underflow will not cause a Reset
PLLEN: PLL Enable bit
1 = 4xPLL enabled
0 = 4xPLL disabled
Unimplemented: Read as ‘1’
Reserved: This location should be programmed to a ‘1’.
Unimplemented: Read as ‘1’
WRT<1:0>: Flash Memory Self-Write Protection bits
11 = Write protection off
10 = 000h to 1FFh write-protected, 200h to FFFh may be modified
01 = 000h to 7FFh write-protected, 800h to FFFh may be modified
00 = 000h to FFFh write-protected, no addresses may be modified
Note 1:
2:
3:
The LVP bit cannot be programmed to ‘0’ when Programming mode is entered via LVP.
The DEBUG bit in Configuration Words is managed automatically by device development tools including
debuggers and programmers. For normal device operation, this bit should be maintained as a '1'.
See Vbor parameter for specific trip point voltages.
DS41441C-page 36
2011-2012 Microchip Technology Inc.