PIC14000
4.2.2.6 PCON REGISTER
The Power Control (PCON) register status contains
2 flag bits to allow differentiation between a Power-on
Reset, an external MCLR reset, WDT reset, or low-volt-
age condition (Figure 4-8).
These bits are cleared on POR. The user must set
these bits following POR. On a subsequent reset if
POR is cleared, this is an indication that the reset was
due to a power-on reset condition.
Note: LVD is unknown on Power-on Reset. It
must then be set by the user and checked
on subsequent resets to see if LVD is
cleared, indicating a low voltage condition
has occurred.
FIGURE 4-8: PCON REGISTER
R/W U
U
UU
U
R/W R/W
r
—
—
—
—
—
POR LVD
Register: PCON W: Writable
Address: 8Eh R: Readable
bit7
bit0 POR value:
U: Unimplemented,
0000_000xb
read as ‘0’
LVD: Low Voltage Detect Flag
1 = A low-voltage detect condition has not occurred.
0 = A low-voltage detect condition has occurred.
Software must set this bit after a
power-on-reset condition has occurred.
POR: Power on Reset Flag
1 = A power on reset condition has not occurred.
Reset must be due to some other source
(WDT, MCLR).
0 = A power on reset condition has occurred.
Software must set this bit after a
power-on-reset condition has occurred.
Unimplemented. Read as ‘0’
Unimplemented. Read as ‘0’
Unimplemented. Read as ‘0’
Unimplemented. Read as ‘0’
Unimplemented. Read as ‘0’
Reserved. Bit 7 is reserved. This bit should be
programmed as ‘0’ .
DS40122B-page 22
Preliminary
© 1996 Microchip Technology Inc.