PIC16F1526 View Datasheet(PDF) - Microchip Technology
Part Name
Description
MFG CO.
'PIC16F1526' PDF : 354 Pages View PDF
PIC16(L)F1526/27
FIGURE 7-3:
INT PIN INTERRUPT TIMING
OSC1
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
CLKOUT (3)
(4)
INT pin
INTF
(1)
(1)
(5)
Interrupt Latency (2)
GIE
INSTRUCTION FLOW
PC
PC
Instruction
Fetched
Inst (PC)
PC + 1
Inst (PC + 1)
PC + 1
—
0004h
Inst (0004h)
0005h
Inst (0005h)
Instruction
Executed
Inst (PC – 1)
Inst (PC)
Dummy Cycle
Dummy Cycle
Inst (0004h)
Note 1:
2:
3:
4:
5:
INTF flag is sampled here (every Q1).
Asynchronous interrupt latency = 3-5 TCY. Synchronous latency = 3-4 TCY, where TCY = instruction cycle time.
Latency is the same whether Inst (PC) is a single cycle or a 2-cycle instruction.
CLKOUT not available in all oscillator modes.
For minimum width of INT pulse, refer to AC specifications in Section 25.0 “Electrical Specifications”.
INTF is enabled to be set any time during the Q4-Q1 cycles.
DS41458B-page 78
Preliminary
2011 Microchip Technology Inc.
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