PIC16LC62X-04/JW View Datasheet(PDF) - Microchip Technology
Part Name
Description
MFG CO.
'PIC16LC62X-04/JW' PDF : 112 Pages View PDF
PIC16C62X(A)
4.2 Data Memory Organization
The data memory (Figure 4-4 and Figure 4-5) is
partitioned into two Banks which contain the general
purpose registers and the special function registers.
Bank 0 is selected when the RP0 bit is cleared. Bank 1
is selected when the RP0 bit (STATUS <5>) is set. The
Special Function Registers are located in the first 32
locations of each Bank. Register locations 20-6Fh
(Bank0) on the PIC16C620(A)/621(A) and 20-7Fh
(Bank0) and A0-BFh (Bank1) on the PIC16C622 are
general purpose registers implemented as static RAM.
Some special purpose registers are mapped in Bank 1.
4.2.1 GENERAL PURPOSE REGISTER FILE
The register file is organized as 80 x 8 in the
PIC16C620(A)/621(A) and 128 x 8 in the
PIC16C622(A). Each is accessed either directly or indi-
rectly through the File Select Register FSR
(Section 4.4).
DS30235F-page 14
Preliminary
© 1997 Microchip Technology Inc.
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