PIC16LC62X-04/JW View Datasheet(PDF) - Microchip Technology
Part Name
Description
MFG CO.
'PIC16LC62X-04/JW' PDF : 112 Pages View PDF
PIC16C62X(A)
9.4 Power-on Reset (POR), Power-up
Timer (PWRT), Oscillator Start-up
Timer (OST) and Brown-out Reset
(BOR)
9.4.1 POWER-ON RESET (POR)
A Power-on Reset pulse is generated on-chip when
VDD rise is detected (in the range of 1.6 V – 1.8 V). To
take advantage of the POR, just tie the MCLR pin
directly (or through a resistor) to VDD. This will eliminate
external RC components usually needed to create
Power-on Reset. A maximum rise time for VDD is
required. See Electrical Specifications for details.
The POR circuit does not produce internal reset when
VDD declines.
When the device starts normal operation (exits the
reset condition), device operating parameters (voltage,
frequency, temperature, etc.) must be met to ensure
operation. If these conditions are not met, the device
must be held in reset until the operating conditions are
met.
For additional information, refer to Application Note
AN607 “Power-up Trouble Shooting”.
9.4.2 POWER-UP TIMER (PWRT)
The Power-up Timer provides a fixed 72 ms (nominal)
time-out on power-up only, from POR or Brown-out
Reset. The Power-up Timer operates on an internal RC
oscillator. The chip is kept in reset as long as PWRT is
active. The PWRT delay allows the VDD to rise to an
acceptable level. A configuration bit, PWRTE can
FIGURE 9-8: BROWN-OUT SITUATIONS
disable (if set) or enable (if cleared or programmed) the
Power-up Timer. The Power-up Timer should always be
enabled when Brown-out Reset is enabled.
The Power-Up Time delay will vary from chip to chip
and due to VDD, temperature and process variation.
See DC parameters for details.
9.4.3 OSCILLATOR START-UP TIMER (OST)
The Oscillator Start-Up Timer (OST) provides a 1024
oscillator cycle (from OSC1 input) delay after the
PWRT delay is over. This ensures that the crystal
oscillator or resonator has started and stabilized.
The OST time-out is invoked only for XT, LP and HS
modes and only on power-on reset or wake-up from
SLEEP.
9.4.4 BROWN-OUT RESET (BOR)
The PIC16C62X(A) members have on-chip Brown-out
Reset circuitry. A configuration bit, BODEN, can dis-
able (if clear/programmed) or enable (if set) the
Brown-out Reset circuitry. If VDD falls below 4.0V refer
to VBOR parameter D005(VBOR) for greater than
parameter (TBOR) in Table 12-6, the brown-out situa-
tion will reset the chip. A reset is not guaranteed to
occur if VDD falls below 4.0V for less than parameter
(TBOR). The chip will remain in Brown-out Reset until
VDD rises above BVDD. The Power-up Timer will now be
invoked and will keep the chip in reset an additional
72 ms. If VDD drops below BVDD while the Power-up
Timer is running, the chip will go back into a Brown-out
Reset and the Power-up Timer will be initialized. Once
VDD rises above BVDD, the Power-Up Timer will exe-
cute a 72 ms reset. The Power-up Timer should always
be enabled when Brown-out Reset is enabled.
Figure 9-8 shows typical Brown-out situations.
VDD
Internal
Reset
VDD
Internal
Reset
VDD
Internal
Reset
DS30235F-page 50
72 ms
<72 ms
72 ms
72 ms
Preliminary
BVDD Max.
BVDD Min.
BVDD Max.
BVDD Min.
BVDD Max.
BVDD Min.
© 1997 Microchip Technology Inc.
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