PIC16LC84T-04I/P View Datasheet(PDF) - Microchip Technology
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MFG CO.
'PIC16LC84T-04I/P' PDF : 110 Pages View PDF
4.3 Program Counter: PCL and PCLATH
The Program Counter (PC) is 13-bits wide. The low
byte is the PCL register, which is a readable and
writable register. The high byte of the PC (PC<12:8>) is
not directly readable nor writable and comes from the
PCLATH register. The PCLATH (PC latch high) register
is a holding register for PC<12:8>. The contents of
PCLATH are transferred to the upper byte of the
program counter when the PC is loaded with a new
value. This occurs during a CALL, GOTO or a write to
PCL. The high bits of PC are loaded from PCLATH as
shown in Figure 4-6.
FIGURE 4-6: LOADING OF PC IN
DIFFERENT SITUATIONS
12
PC
PCH
87
PCL
PCLATH<4:0>
5
0
INST with PCL
as dest
8
ALU result
PCLATH
PCH
PCL
12 11 10 8 7
0
PC
2
PCLATH<4:3>
GOTO, CALL
11
Opcode <10:0>
PCLATH
4.3.1 COMPUTED GOTO
A computed GOTO is accomplished by adding an offset
to the program counter (ADDWF PCL). When doing a
table read using a computed GOTO method, care should
be exercised if the table location crosses a PCL memory
boundary (each 256 word block). Refer to the application
note “Implementing a Table Read” (AN556).
4.3.2 PROGRAM MEMORY PAGING
The PIC16C84 has 1K of program memory. The CALL
and GOTO instructions have an 11-bit address range.
This 11-bit address range allows a branch within a 2K
program memory page size. For future PIC16CXX
program memory expansion, there must be another
two bits to specify the program memory page. These
paging bits come from the PCLATH<4:3> bits
(Figure 4-6). When doing a CALL or a GOTO instruction,
the user must ensure that these page bits
(PCLATH<4:3>) are programmed to the desired
program memory page. If a CALL instruction (or
interrupt) is executed, the entire 13-bit PC is “pushed”
onto the stack (see next section). Therefore, manipula-
tion of the PCLATH<4:3> is not required for the return
instructions (which “pops” the PC from the stack).
PIC16C84
Note:
The PIC16C84 ignores the PCLATH<4:3>
bits, which are used for program memory
pages 1, 2 and 3 (0800h - 1FFFh). The use
of PCLATH<4:3> as general purpose R/W
bits is not recommended since this may
affect upward compatibility with future
products.
4.4 Stack
The PIC16C84 has an 8 deep x 13-bit wide hardware
stack (Figure 4-1). The stack space is not part of either
program or data space and the stack pointer is not
readable or writable.
The entire 13-bit PC is “pushed” onto the stack when a
CALL instruction is executed or an interrupt is acknowl-
edged. The stack is “popped” in the event of a
RETURN, RETLW or a RETFIE instruction execution.
PCLATH is not affected by a push or a pop operation.
Note:
There are no instruction mnemonics called
push or pop. These are actions that occur
from the execution of the CALL, RETURN,
RETLW, and RETFIE instructions, or the
vectoring to an interrupt address.
The stack operates as a circular buffer. That is, after the
stack has been pushed eight times, the ninth push over-
writes the value that was stored from the first push. The
tenth push overwrites the second push (and so on).
If the stack is effectively popped nine times, the PC
value is the same as the value from the first pop.
Note: There are no status bits to indicate stack
overflow or stack underflow conditions.
1996-2013 Microchip Technology Inc.
DS30445D-page 17
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