PIC18F010T-I/SO View Datasheet(PDF) - Microchip Technology
Part Name
Description
MFG CO.
'PIC18F010T-I/SO' PDF : 176 Pages View PDF
PIC18F010/020
REGISTER 9-1:
WPUB: WEAK PULL-UP REGISTER (ADDRESS 0XF79h)
U-0
—
bit 7
U-0
R/P-1 R/P-1
R/P-1
R/P-1 R/P-1 R/P-1
—
WPUB5 WPUB4 WPUB3 WPUB2 WPUB1 WPUB0
bit 0
bit 7-6
bit 5-0
Unimplemented: Read as ‘0’
WPUB<5:0>: Weak Pull-up Register bit
1 = Pull-up disabled
0 = Pull-up enabled
Note 1: Global RBPU must be enabled for individual pull-ups to be enabled.
2: The weak pull-up device is automatically disabled if the pin is in output mode
(TRIS = 0).
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
’1’ = Bit is set
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared x = Bit is unknown
REGISTER 9-2:
IOCB: INTERRUPT-ON-CHANGE PORTB REGISTER (ADDRESS 0XF78h)
U-0
—
bit 7
U-0
R/W-0 R/W-0
—
IOCB5 IOCB4
R/W-0
IOCB3
R/W-0
IOCB2
R/W-0
IOCB1
R/W-0
IOCB0
bit 0
bit 7-6
bit 5-0
Unimplemented: Read as ‘0’
IOCB<5:0>: Interrupt-on-Change PORTB Control bit
1 = Interrupt-on-change enabled
0 = Interrupt-on-change disabled
Note 1: Global interrupt enables (GIE and RBIE) must be enabled for individual interrupts to
be recognized.
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
’1’ = Bit is set
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared x = Bit is unknown
DS41142A-page 70
Preliminary
2001 Microchip Technology Inc.
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