PIC18F010T View Datasheet(PDF) - Microchip Technology
Part Name
Description
MFG CO.
'PIC18F010T' PDF : 176 Pages View PDF
13.1 Instruction Set
ADDLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Q1
Decode
ADD literal to WREG
[ label ] ADDLW k
0 ≤ k ≤ 255
(WREG) + k → WREG
N,OV, C, DC, Z
0000 1111 kkkk kkkk
The contents of WREG are added
to the 8-bit literal ’k’ and the result is
placed in WREG.
1
1
Q2
Read
literal ’k’
Q3
Process
Data
Q4
Write to
WREG
Example:
ADDLW 0x15
Before Instruction
WREG = 0x10
N
=?
OV
=?
C
=?
DC
=?
Z
=?
After Instruction
WREG =
N
=
OV
=
C
=
DC
=
Z
=
0x25
0
0
0
0
0
PIC18F010/020
ADDWF
ADD WREG to f
Syntax:
[ label ] ADDWF f [,d] [,a]
Operands:
0 ≤ f ≤ 255
d ∈ [0,1]
a ∈ [0,1]
Operation:
(WREG) + (f) → dest
Status Affected: N,OV, C, DC, Z
Encoding:
0010 01da ffff ffff
Description:
Add WREG to register ’f’. If ’d’ is 0,
the result is stored in WREG. If ’d’
is 1, the result is stored back in reg-
ister 'f' (default). If ’a’ is 0, the
Access Bank will be selected. If ’a’
is 1, the Bank will be selected as
per the BSR value.
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Decode
Q2
Read
register ’f’
Q3
Process
Data
Q4
Write to
destination
Example:
ADDWF
Before Instruction
WREG = 0x17
REG = 0xC2
N
=?
OV
=?
C
=?
DC
=?
Z
=?
After Instruction
WREG =
REG =
N
=
OV
=
C
=
DC
=
Z
=
0xD9
0xC2
1
0
0
0
0
REG, W
2001 Microchip Technology Inc.
Preliminary
DS41142A-page 101
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