PIC18F010T View Datasheet(PDF) - Microchip Technology
Part Name
Description
MFG CO.
'PIC18F010T' PDF : 176 Pages View PDF
PIC18F010/020
REGISTER 8-2: INTCON2 REGISTER
R/W-1
R/W-1
U-0
RBPU INTEDG0
—
bit 7
U-0
U-0
R/W-1
U-0
—
—
TMR0IP
—
bit 7
bit 6
bit 5-3
bit 2
bit 1
bit 0
RBPU: PORTB Pull-up Enable bit
1 = All PORTB pull-ups are disabled
0 = PORTB pull-ups are enabled by individual port latch values
INTEDG0:External Interrupt 0 Edge Select bit
1 = Interrupt on rising edge
0 = Interrupt on falling edge
Unimplemented: Read as '0'
TMR0IP: TMR0 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
Unimplemented: Read as '0'
RBIP: RB Port Change Interrupt Priority bit
1 = High priority
0 = Low priority
R/W-1
RBIP
bit 0
Legend:
R = Readable bit
- n = Value at POR Reset
W = Writable bit
’1’ = Bit is set
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared x = Bit is unknown
Note:
Interrupt flag bits get set when an interrupt condition occurs, regardless of the state
of its corresponding enable bit, or the global enable bit. User software should ensure
the appropriate interrupt flag bits are clear prior to enabling an interrupt. This feature
allows for software polling.
DS41142A-page 62
Preliminary
2001 Microchip Technology Inc.
Share Link: 
