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PIC18F2682 View Datasheet(PDF) - Microchip Technology

Part Name
Description
MFG CO.
'PIC18F2682' PDF : 484 Pages View PDF
PIC18F2682/2685/4682/4685
FIGURE 4-6:
SLOW RISE TIME (MCLR TIED TO VDD, VDD RISE > TPWRT)
VDD
MCLR
INTERNAL POR
5V
0V
1V
PWRT TIME-OUT
OST TIME-OUT
TPWRT
TOST
INTERNAL RESET
FIGURE 4-7:
TIME-OUT SEQUENCE ON POR w/PLL ENABLED (MCLR TIED TO VDD)
VDD
MCLR
INTERNAL POR
PWRT TIME-OUT
OST TIME-OUT
PLL TIME-OUT
INTERNAL RESET
TPWRT
TOST
TPLL
Note:
TOST = 1024 clock cycles.
TPLL 2 ms max. First three stages of the Power-up Timer.
© 2007 Microchip Technology Inc.
Preliminary
DS39761B-page 47
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