PIC18F6310 View Datasheet(PDF) - Microchip Technology
Part Name
Description
MFG CO.
'PIC18F6310' PDF : 404 Pages View PDF
PIC18F6310/6410/8310/8410
TABLE 1-3: PIC18F8310/8410 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number Pin Buffer
TQFP
Type Type
Description
PORTD is a bidirectional I/O port.
RD0/AD0/PSP0
RD0
AD0
PSP0
72
I/O ST
Digital I/O.
I/O TTL
External memory address/data 0.
I/O TTL
Parallel Slave Port data.
RD1/AD1/PSP1
RD1
AD1
PSP1
69
I/O ST
Digital I/O.
I/O TTL
External memory address/data 1.
I/O TTL
Parallel Slave Port data.
RD2/AD2/PSP2
RD2
AD2
PSP2
68
I/O ST
Digital I/O.
I/O TTL
External memory address/data 2.
I/O TTL
Parallel Slave Port data.
RD3/AD3/PSP3
RD3
AD3
PSP3
67
I/O ST
Digital I/O.
I/O TTL
External memory address/data 3.
I/O TTL
Parallel Slave Port data.
RD4/AD4/PSP4
RD4
AD4
PSP4
66
I/O ST
Digital I/O.
I/O TTL
External memory address/data 4.
I/O TTL
Parallel Slave Port data.
RD5/AD5/PSP5
RD5
AD5
PSP5
65
I/O ST
Digital I/O.
I/O TTL
External memory address/data 5.
I/O TTL
Parallel Slave Port data.
RD6/AD6/PSP6
RD6
AD6
PSP6
64
I/O ST
Digital I/O.
I/O TTL
External memory address/data 6.
I/O TTL
Parallel Slave Port data.
RD7/AD7/PSP7
RD7
AD7
PSP7
63
I/O ST
Digital I/O.
I/O TTL
External memory address/data 7.
I/O TTL
Parallel Slave Port data.
Legend:
TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
I = Input
P = Power
CMOS
Analog
O
OD
= CMOS compatible input or output
= Analog input
= Output
= Open-Drain (no P diode to VDD)
Note 1: Alternate assignment for CCP2 when configuration bit CCP2MX is cleared (all operating modes except
Microcontroller mode).
2: Default assignment for CCP2 in all operating modes (CCP2MX is set).
3: Alternate assignment for CCP2 when CCP2MX is cleared (Microcontroller mode only).
DS39635A-page 24
Preliminary
2004 Microchip Technology Inc.
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