PIC18F6310 View Datasheet(PDF) - Microchip Technology
Part Name
Description
MFG CO.
'PIC18F6310' PDF : 404 Pages View PDF
PIC18F6310/6410/8310/8410
FIGURE 3-1:
TRANSITION TIMING FOR ENTRY TO SEC_RUN MODE
Q1 Q2 Q3 Q4 Q1
Q2 Q3 Q4 Q1 Q2 Q3
T1OSI
OSC1
1
2
3
n-1 n
Clock Transition
CPU
Clock
Peripheral
Clock
Program
Counter
PC
PC + 2
PC + 4
FIGURE 3-2:
TRANSITION TIMING FROM SEC_RUN MODE TO PRI_RUN MODE (HSPLL)
Q1
Q2
Q3
Q4 Q1
Q2 Q3 Q4 Q1 Q2 Q3
T1OSI
OSC1
PLL Clock
Output
CPU Clock
TOST(1)
TPLL(1)
1 2 n-1 n
Clock
Transition
Peripheral
Clock
Program
Counter
PC
PC + 2
SCS1:SCS0 bits Changed
OSTS bit Set
Note 1: TOST = 1024 TOSC; TPLL = 2 ms (approx). These intervals are not shown to scale.
PC + 4
2004 Microchip Technology Inc.
Preliminary
DS39635A-page 41
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