PIC18LF010T-I View Datasheet(PDF) - Microchip Technology
Part Name
Description
MFG CO.
'PIC18LF010T-I' PDF : 176 Pages View PDF
PIC18F010/020
FIGURE 9-2:
WPUBx(2)
Data Bus
WR LATB
or
PORTB
BLOCK DIAGRAM OF
RB<2:0> PINS
VDD
Data Latch
DQ
CK
P
Weak
Pull-up
I/O
pin(1)
TRIS Latch
DQ
WR TRISB
CK
TTL
Input
Buffer
ST
Buffer
RD TRISB
RD LATB
Latch
QD
RD PORTB
IOCB Register
DQ
WR IOCB
CK
Set RBIF
EN
Q4
From other
RB pins
QD
RD PORTB
EN
Q3
RB2/T0CKI/INT0
RB<1:0> in Serial Programming mode
Note 1: I/O pins have diode protection to VDD and VSS.
2: To enable weak pull-ups, set the appropriate TRIS bit(s)
and clear the WPUB bit(s) and RBPU bit.
FIGURE 9-3:
BLOCK DIAGRAM OF
RB3 PIN
WPUBx(2)
Data Bus
WR LATB
or
PORTB
Data Latch
DQ
CK
TRIS Latch
DQ
VDD
P
Weak
Pull-up
Open Drain
I/O
pin(1)
WR TRISB
CK
TTL
Input
Buffer
ST
Buffer
RD TRISB
RD LATB
Latch
QD
RD PORTB
EN
Q4
WR IOCB
Set RBIF
IOCB Register
DQ
CK
From other
RB pins
MCLR
QD
RD PORTB
EN
Q3
Note 1: I/O pins have diode protection to VDD and VSS.
2: To enable weak pull-ups, set the appropriate TRIS bit(s)
and clear the WPUB bit(s) and RBPU bit.
DS41142A-page 68
Preliminary
2001 Microchip Technology Inc.
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