PIC24HJ128GP202 View Datasheet(PDF) - Microchip Technology
Part Name
Description
MFG CO.
'PIC24HJ128GP202' PDF : 357 Pages View PDF
PIC24HJ32GP302/304, PIC24HJ64GPX02/X04 AND PIC24HJ128GPX02/X04
REGISTER 7-3: INTCON1: INTERRUPT CONTROL REGISTER 1
R/W-0
U-0
U-0
U-0
U-0
U-0
NSTDIS
—
—
—
—
—
bit 15
U-0
U-0
—
—
bit 8
U-0
—
bit 7
R/W-0
R/W-0
R/W-0
R/W-0
DIV0ERR DMACERR MATHERR ADDRERR
R/W-0
STKERR
R/W-0
OSCFAIL
U-0
—
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
bit 14-7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
NSTDIS: Interrupt Nesting Disable bit
1 = Interrupt nesting is disabled
0 = Interrupt nesting is enabled
Unimplemented: Read as ‘0’
DIV0ERR: Arithmetic Error Status bit
1 = Math error trap was caused by a divide by zero
0 = Math error trap was not caused by a divide by zero
DMACERR: DMA Controller Error Status bit
1 = DMA controller error trap has occurred
0 = DMA controller error trap has not occurred
MATHERR: Arithmetic Error Status bit
1 = Math error trap has occurred
0 = Math error trap has not occurred
ADDRERR: Address Error Trap Status bit
1 = Address error trap has occurred
0 = Address error trap has not occurred
STKERR: Stack Error Trap Status bit
1 = Stack error trap has occurred
0 = Stack error trap has not occurred
OSCFAIL: Oscillator Failure Trap Status bit
1 = Oscillator failure trap has occurred
0 = Oscillator failure trap has not occurred
Unimplemented: Read as ‘0’
DS70293D-page 74
Preliminary
© 2009 Microchip Technology Inc.
Share Link: 
