PM6670S View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'PM6670S' PDF : 53 Pages View PDF
PM6670S
Device description
7.1.5
VDDQ output voltage can be set in the range of 0.9 V to 2.6 V. Adjustable mode
automatically switches DDRSEL pin to become the power saving algorithm selector: if tied
to +5 V, the forced-PWM (fixed frequency) control is performed. If grounded or connected to
VREF pin (1.237 V reference voltage), the pulse-skip or non-audible pulse-skip modes are
respectively selected.
Table 8. Mode-of-operation settings summary
Mode
DDRSEL
VDDQ
VMODE > 4.3 V
VMODE < 3.7 V
VDDRSEL > 4.2 V
1V < VDDRSEL < 3.5 V
<0.5 V
VDDRSEL > 4.2 V
1V < VDDRSEL < 3.5 V
VDDRSEL < 0.5 V
1.8 V
1.5 V
ADJ
Operating mode
Pulse-skip
Forced-PWM
Non-audible pulse-skip
Pulse-skip
Current sensing and current limit
The PM6670S switching controller uses a valley current sensing algorithm to properly
handle the current limit protection and the inductor current zero-crossing information. The
current is sensed during the conduction time of the low-side MOSFET. The current sensing
element is the on-resistance of the low-side switch. The sensing scheme is visible in
Figure 36.
Figure 36. Current sensing scheme
VIN
PPMM66667700S
HGATE
PHASE
CSNS
R 100µA· ILIM
LGATE
PGND
VOUT
I R· VALLEY DSon
An internal 120 μA current source is connected to CSNS pin that is also the non-inverting
input of the positive current limit comparator. When the voltage drop developed across the
sensing parameter equals the voltage drop across the programming resistor RILIM, the
controller skips subsequent cycles until the overcurrent condition is detected or the output
UV protection latches off the device (see Section 7.1.11: Over voltage and under voltage
protections on page 36).
Doc ID 14432 Rev 4
31/54
Share Link: 
