PSD4201G3-70 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'PSD4201G3-70' PDF : 93 Pages View PDF
Preliminary Information
PSD4000 Series
Microcontroller Interface – PSD4000 AC/DC Parameters
(5V ± 10% Versions)
Read Timing (5 V ± 10% Versions)
Symbol
t LVLX
t AVLX
t LXAX
t AVQV
t SLQV
t RLQV
t RHQX
t RLRH
t RHQZ
t EHEL
t THEH
t ELTL
t AVPV
Parameter
ALE or AS Pulse Width
Address Setup Time
Address Hold Time
Address Valid to Data Valid
CS Valid to Data Valid
RD to Data Valid
RD or PSEN to Data Valid,
80C51XA Mode
RD Data Hold Time
RD Pulse Width
RD to Data High-Z
E Pulse Width
R/W Setup Time to Enable
R/W Hold Time After Enable
Address Input Valid to Address
Output Delay
Conditions
(Note 3)
(Note 3)
(Note 3)
(Note 5)
(Note 2)
(Note 1)
(Note 1)
(Note 1)
(Note 4)
-70
Min Max
15
4
7
70
75
24
-90
Turbo
Min Max Off Unit
20
ns
6
ns
8
ns
90 Add 12** ns
100
ns
32
ns
31
38
ns
0
0
ns
27
32
ns
20
25
ns
27
32
ns
6
10
ns
0
0
ns
20
25
ns
NOTES: 1.
2.
3.
4.
5.
RD timing has the same timing as DS, LDS, UDS, and PSEN signals.
RD and PSEN have the same timing.
Any input used to select an internal PSD4000 function.
In multiplexed mode, latched addresses generated from ADIO delay to address output on any Port.
RD timing has the same timing as DS, LDS, and UDS signals.
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