PSD835G1-12M View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'PSD835G1-12M' PDF : 110 Pages View PDF
PSD8XX Family
The
PSD835G2
Functional
Blocks
(cont.)
Figure 29. APD Logic Block
PSD835G2
APD EN
PMMR0 BIT 1=1
TRANSITION
DETECTION
ALE
RESET
CSI
CLKIN
EDGE
DETECT
CLR PD
APD
COUNTER
PD
DISABLE MAIN AND
SECONDARY FLASH/SRAM
DISABLE BUS
INTERFACE
SECONDARY
FLASH SELECT
PLD
MAIN FLASH SELECT
SRAM SELECT
POWER DOWN
(PDN) SELECT
Figure 30. Enable Power Down Flow Chart
RESET
Enable APD
Set PMMR0 Bit 1 = 1
OPTIONAL
Disable desired inputs to PLD
by setting PMMR0 bits 4 and 5
and PMMR2 bits 0.
No
ALE/AS idle
for 15 CLKIN
clocks?
Yes
PSD in Power
Down Mode
66
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