QL5130-33APB256C View Datasheet(PDF) - QuickLogic Corporation
Part Name
Description
MFG CO.
QL5130-33APB256C
QuickLogic Corporation
'QL5130-33APB256C' PDF : 17 Pages View PDF
QL5130 - QuickPCITM
33 MHz/32-bit PCI Target with Embedded Programmable Logic and Dual Port SRAM
last updated 12/1099
Device Highlights
DEVICE HIGHLIGHTS
Q8DÃ7ñÃ""ÃHCÃ"!ÃivÃqhhÃhqÃhqq
r
High Performance PCI Controller
s 32-bit / 33 MHz PCI Target
s Zero-wait state PCI Target provides 132 MB/s transfer rates
s Programmable back-end interface to optional local processor
s Independent PCI bus (33 MHz) and local bus
(up to 160 MHz) clocks
s Fully customizable PCI Configuration Space
s Configurable FIFOs with depths up to 128
s Reference design with driver code (Win 95/98/Win 2000/
NT4.0)
available
s PCI v2.2 compliant
s Supports Type 0 Configuration Cycles
s 3.3V, 5V Tolerant PCI signaling supports Universal PCI
Adapter designs
s 3.3V CMOS in 144-pin TQFP, 208-pin PQFP and 256-PBGA
s Supports endian conversions
s Unlimited/Continuous Burst Transfers Supported
Extendable PCI Functionality
s Support for Configuration Space from 0x40 to 0x3FF
s Multi-Function, Expanded Capabilities, & Expansion ROM
capable
s Power management, Compact PCI, hot-swap/hot-plug
compatible
s PCI v2.2 Power Management Spec compatible
s PCI v2.2 Vital Product Data (VPD) configuration support
s Programmable Interrupt Generator
s I2O support with local processor
s Mailbox register support
Programmable Logic
s 57K System gates / 619 Logic Cells
s 13,824 RAM bits, up to 157 I/O pins
s 250 MHz 16-bit counters, 275 MHz Datapaths,
160 MHz FIFOs
s All back-end interface and glue-logic can be implemented
on chip
s 6 64-deep FIFOs (2 RAMs each) or 3 128-deep FIFOs
(4 RAMs each) or a combination that requires 12 or less
QuickLogic RAM Modules
s (2) 32-bit busses interface between the PCI Controller and the
Programmable Logic
U6SB@U
8PIUSPGG@S
Q8DÃ8PIUSPGG@S
CDBCÃTQ@@9
96U6ÃQ6UC
"!
"!
DIU@SA68@
8svt
Thpr
CvtuÃTrrq
GtvpÃ8ryy
$&FÃBhr
%
HC
ADAP
$&ÃVr
ÃDP
QSPBS6HH67G@ÃÃGPBD8
FIGURE 1. QL5130 Diagram
ARCAHrcIhTiEteCcTtuUrReEOvOeVrvEieRwVIEW
The QL5130 device in the QuickLogic QuickPCI ESP
(Embedded Standard Product) family provides a com-
plete and customizable PCI interface solution com-
bined with 57,000 System gates of programmable
logic. This device eliminates any need for the designer
to worry about PCI bus compliance, yet allows for the
maximum 32-bit PCI bus bandwidth (132 MB/s).
The programmable logic portion of the device con-
tains 619 QuickLogic Logic Cells, and 12 QuickLogic
Dual-Port RAM Blocks. These configurable RAM
blocks can be configured in many width/depth combi-
nations. They can also be combined with logic cells to
form FIFOs, or be initialized via Serial EEPROM on
power-up and used as ROMs. See the RAM section of
this data sheet for more information.
The QL5130 device meets PCI 2.2 electrical and tim-
ing specifications and has been fully hardware-tested.
This device also supports the Win’98 and PC’98 stan-
dards. The QL5130 device features 3.3-volt opera-
tion with multi-volt compatible I/Os. Thus it can
easily operate in 3.3-volt systems and is fully compati-
ble with 3.3V, 5V and Universal PCI card develop-
ment.
Rev B
Share Link: 