QL5732 Enhanced QuickPCI Device Data Sheet Rev. E
PAD
OUTPUT
REGISTER
Figure 19: Output Register Cell
tOUTHL
H
H
L
L
tOUTLH
H
H
Z
L
Z
tPZH
L
H
H
Z
Z
L
L
tPLZ
tPZL
tPHZ
Figure 20: Output Register Cell Timing
Table 19: Output Slew Rates @ VCCIO = 3.3 V
Fast Slew
Slow Slew
Rising Edge
2.8 V/ns
1.0 V/ns
Falling Edge
2.86 V/ns
1.0 V/ns
© 2003 QuickLogic Corporation
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