QL7180-7PT208M View Datasheet(PDF) - QuickLogic Corporation
Part Name
Description
MFG CO.
'QL7180-7PT208M' PDF : 65 Pages View PDF
EclipsePlus Family Data Sheet Rev. A
Power vs. Operating Frequency
The basic power equation which best models power consumption is given below:
PTOTAL = 0.350 + f[0.0031 ηLC + 0.0948 ηCKBF + 0.01 ηCLBF + 0.0263 ηCKLD + 0.543 ηRAM + 0.20
ηPLL + 0.0035 ηINP + 0.0257 ηOUTP] (mW)
Where:
ηLC is the total number of logic cells in the design
ηCKBF = # of clock buffers
ηCLBF = # of column clock buffers
ηCKLD = # of loads connected to the column clock buffers
ηRAM = # of RAM blocks
ηPLL = # of PLLs
ηINP is the number of input pins
ηOUTP is the number of output pins
Figure 23 exhibits the power consumption in an EclipsePlus device. The chip was filled with (300) 8-bit
counters⎯approximately 76% logic cell utilization.
Figure 23: Power Consumption
Power vs Freq. (Counter_300)
2.5
2
1.5
1
0.5
0
0
20
40
60
80
100
120
140
Frequency (Mhz)
24
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