QL8250 View Datasheet(PDF) - QuickLogic Corporation

Part Name

Description

MFG CO.

QL8250

Low Power FPGA Combining Performance, Density, and Embeded RAM

QuickLogic Corporation 

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(FOLSVH,, )DPLO\ 'DWD 6KHHW 5HY %

PAD

OUTPUT

REGISTER

)LJXUH  (FOLSVH,, 2XWSXW 5HJLVWHU &HOO

7DEOH  6WDQGDUG ,QSXW 'HOD\V

6\PERO

3DUDPHWHU

6WDQGDUG ,QSXW

'HOD\V

7R JHW WKH WRWDO LQSXW GHOD\ DGG WKLV GHOD\ WR W,68

tSID (LVTTL)

LVTTL input delay: Low Voltage TTL for 3.3 V

applications

tSID (LVCMOS2)

LVCMOS2 input delay: Low Voltage CMOS for 2.5 V

and lower applications

tSID

LVCMOS18 input delay: Low Voltage CMOS for 1.8

(LVCMOS18) V applications

tSID (GTL+)

tSID (SSTL3)

GTL+ input delay: Gunning Transceiver Logic

SSTL3 input delay: Stub Series Terminated Logic for

3.3 V

tSID (SSTL2)

SSTL2 input delay: Stub Series Terminated Logic for

2.5 V

9DOXH

0LQ

0D[

-

0.34 ns

-

0.42 ns

-

-

-

0.68 ns

-

0.55 ns

-

0.61 ns

Preliminary ‹  4XLFN/RJLF &RUSRUDWLRQ

ZZZTXLFNORJLFFRP ‡‡‡‡‡‡



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