RD13JS View Datasheet(PDF) - NEC => Renesas Technology
Part Name
Description
MFG CO.
'RD13JS' PDF : 226 Pages View PDF
Microcomputer
V Series
s 32-Bit
Type number Alias
Features
µP D7 0 6 1 6
µP D7 0 6 3 2
µP D7 0 6 1 5
V60TM
V70TM
V60
• Virtual memory (paging method)
• Level protection architecture
4-level hierarchical protection function
for system multi-programming.
• Abundant general registers
Thirty two 32-bit general registers for
optimizing compiler
• Refined instruction set
2-address method: Arbitrary addressing
mode can be used independently for
source operand and destination
operand.
• Abundant address modes and data
types
Auto increment/decrement mode for
string process, and memory indirect
addressing for pointer operation
• Multiprocessor system
FRM function for increasing system
reliability using two or more processors.
• V20/V30 simulation mode
• Identical with µPD70616 except that
FRM function and V20/V30 emulation
function are eliminated. High cost-to-
performance chip
Address/data
bus
24 bits/
16 bits
32 bits/
32 bits
24 bits/
16 bits
Memory space
4G bytes
Operating
frequency
16 MHz
20 MHz
16 MHz
Package
• 68-pin PGA
• 132-pin PGA
• 200-pin QFP
• 120-pin QFP
57
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