RF2498
Application Schematic
VCC
BAND SEL IF SEL
GPS IF
VCC
CDMA+
CDMA-
FM+
FM-
VCC
LO IN
LO OUT
DIV EN
TX BUF EN
VCC
10 4
TBD
95
CDMA
IF SAW
10 4
95
FM
IF SAW
TBD
TBD
TBD
TBD
TBD
VCC
TBD
TBD
TBD
TBD
VCC
TBD
TBD
TBD
VCC
TBD
See Note 1
7.5 kΩ
See
Note 2
20 kΩ
See Note 3
5.1 kΩ
32
31
30
1
2
TBD
TBD
3
4
5
6
TBD
7
8
9
10
11
2.2 nH
See
Note 14
W 3.3 nH
E200 Ω
NSee Note 9
See Note 13
33 nH
33 nF
See
Note 4
5 OUT
IN 2
GPS
RF Saw
6.8 nH
See Note 14
15 Ω
See
Note 11
18 nH
See Notes
12 and 15
See
Note 10
1.0 pF
29
28
27
26
25
See Note 4
2.7 nH
See Notes
24
33 nF
14 and 15 See Notes 33 nH
7 and 15
S 23
33 nF
See Note 4
1.2 nH
See Notes
14 and 15
22
N4.7 nH See Note 11
21
See Notes
12 and 15
10 Ω
G20
See Notes 2.7 nH
14 and 15
I19
33 nF
See Note 4
33 nH
1.2 nH
See
Notes
S18
See Notes
6 and 15
7 and 15
17
DE 12
13
14
15
16
VCC
10 nH
See Notes
12 and 15
See Note 4
33 nF
1.2 pF
See Note 8
6 GND
3 GND
GND 4
GND 1 Cell
RF Saw
2.4 pF
See Note 14
VCC
GPS LNA IN
See
Note 10
0.75 pF
PCS LNA IN
IP SET
VCC
CELL LNA IN
LNA GAIN
ENABLE
MIX GAIN
R TBD
TBD
33 nF
1 pF See Note 4
See Note 8
6 GND
3 GND
PCS
RF Saw
GND 4
GND 1
33 nF
See Note 4
O Note: If any functional blocks are not being used, the unused pins can be left with no connection.
Layout Note:
To minimize losses and radiation, the RF signal traces should be as short as possible. The IF+ and
F IF- outputs traces should be symmetrical. All bypass capacitors and matching capacitors must
have a ground via very close to the capacitor. Each capacitor should have its own ground via. All
NseOleTcEte: dNI.FPoleuaOtpseutcomTnatatcchtinRgFMcoDmappopnliecnattiovnaleunegsinaereeridnegpfeonr daesnsitstoanncbeowaritdh lIaFyoouutt,puIFt mSaAtcWhinfiglt.er and the IF frequency traces should be 50 Ω transmission lines. Position inductors to reduce coupling (see note 15).
NOTES:
1. This resistor sets mixer preamp and mixer currents in all bands.
Lowering the resistance results in higher currents.
2. This resistor sets LNA currents of all bands in boost mode.
Increasing the resistor value results in lower currents.
3. Sets internal bias voltage. Recommend 5.1 kΩ.
4. DC blocking capacitor.
5. PCS LNA Input Matching. Optimize for NF.
6. Determines trade off between IIP3 and Gain.
Higher value inductor means lower gain and higher IIP3.
7. Cell/PCS LNA Input Matching for optimum IIP3.
Low impedance path to ground at low frequency for optimum IIP3.
8. For cell and PCS mixer input matching.
9. PCS Interstage matching. As the value of the inductance is increased,
the PCS mixer preamp gain will decrease and the IIP3 will increase
and vice versa.
10. For optimum NF and input matching. As the value of the capacitance
is increased, the NF will become worse.
11. To optimize performance over temperature and bias.
12. For output matching and a DC supply bias choke.
13. GPS mixer input matching for optimum IIP3.
Low impedance path to ground at low frequency for optimum IIP3.
14. Input or Output matching.
15. Coupling of coils on the input, output, and emitter (where applicable)
of any LNA should be minimized to reduce the risk of oscillation. We
recommend separating the inductors and/or positioning them 90o
relative to each other.
8-312
Rev A4 070308