MC9S12DT128 Device User Guide — V02.09
Pin Name Pin Name Pin Name Pin Name Pin Name Powered
Function 1 Function 2 Function 3 Function 4 Function 5 by
PP7
KWP7
PWM7
—
PP6
KWP6
PWM6
—
PP5
KWP5
PWM5
—
PP4
KWP4
PWM4
—
—
VDDX
—
VDDX
—
VDDX
—
VDDX
Internal Pull
Resistor
CTRL
Reset
State
Description
PERP/
PPSP
Disabled
Port P I/O, Interrupt,
Channel 7 of PWM
PERP/
PPSP
Disabled
Port P I/O, Interrupt,
Channel 6 of PWM
PERP/
PPSP
Disabled
Port P I/O, Interrupt,
Channel 5 of PWM
PERP/
PPSP
Disabled
Port P I/O, Interrupt,
Channel 4 of PWM
PP3
KWP3
PWM3
SS1
—
VDDX
PERP/
PPSP
Port P I/O, Interrupt,
Disabled Channel 3 of PWM,
SS of SPI1
PP2
KWP2
PWM2
SCK1
—
VDDX
PERP/
PPSP
Port P I/O, Interrupt,
Disabled Channel 2 of PWM,
SCK of SPI1
PP1
KWP1
PWM1
MOSI1
—
VDDX
PERP/
PPSP
Port P I/O, Interrupt,
Disabled Channel 1 of PWM,
MOSI of SPI1
PP0
PS7
PS6
PS5
PS4
PS3
PS2
PS1
PS0
PT[7:0]
KWP0
SS0
SCK0
MOSI0
MISO0
TXD1
RXD1
TXD0
RXD0
IOC[7:0]
PWM0
—
—
—
—
—
—
—
—
—
MISO1
—
—
—
—
—
—
—
—
—
—
VDDX
PERP/
PPSP
Port P I/O, Interrupt,
Disabled Channel 0 of PWM,
MISO2 of SPI1
—
VDDX
PERS/
PPSS
Up
Port S I/O, SS of
SPI0
—
VDDX
PERS/
PPSS
Up
Port S I/O, SCK of
SPI0
—
VDDX
PERS/
PPSS
Up
Port S I/O, MOSI of
SPI0
—
VDDX
PERS/
PPSS
Up
Port S I/O, MISO of
SPI0
—
VDDX
PERS/
PPSS
Up
Port S I/O, TXD of
SCI1
—
VDDX
PERS/
PPSS
Up
Port S I/O, RXD of
SCI1
—
VDDX
PERS/
PPSS
Up
Port S I/O, TXD of
SCI0
—
VDDX
PERS/
PPSS
Up
Port S I/O, RXD of
SCI0
—
VDDX
PERT/
PPST
Disabled
Port T I/O, Timer
channels
NOTES:
1. Refer to PEAR register description in HCS12 Multiplexed External Bus Interface (MEBI) Block Guide.
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