S24163PAT View Datasheet(PDF) - Summit Microelectronics
Part Name
Description
MFG CO.
'S24163PAT' PDF : 12 Pages View PDF
S24163
SDA
SCL
Master
Transmitter/
Receiver
VCC
RESET
Slave
Receiver
Slave
Transmitter/
Receiver
(24163)
Master
Transmitter
FIGURE 1. TYPICAL SYSTEM CONFIGURATION
Master
Transmitter/
Receiver
(µC/ µP)
2014 T fig01 2.0
SCL
SDA In
Data must
remain stable
while clock
is HIGH.
Change
of data
allowed
Data must
remain stable
while clock
is HIGH.
tHD:DAT
tSU:DAT
FIGURE 2. INPUT DATA PROTOCOL
tHD:DAT
2014 ILL4 1.0
SCL
SDA In
START
Condition
STOP
Condition
FIGURE 3. START AND STOP CONDITIONS
3
2014 ILL5 1.0
2014 2.0 3/21/00
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