S39421 View Datasheet(PDF) - Summit Microelectronics
Part Name
Description
MFG CO.
'S39421' PDF : 28 Pages View PDF
S39421
RESET
I/Oe
ASIC I/Oa
I/Ob
I/Oc
I/Od
RESET
DD
SK
DO
DI
CS
2024 ILL11.0
FIGURE 15. DOWNLOAD ENABLED IN CONJUNCTION WITH RESET RELEASE
Figure 15 is a good implementation to use whenever there is a requirement to download data from the memory after
any reset cycle. This provides control of the DD input function after power-on, brown-out or a system induced reset
condition. In this way the data download function is ready under any circumstance an ASIC or MCU might need to
reload initialization data.
VCC
RESET
DD
CS
SK
DO
DD Mode
Enabled
DD Mode
Disabled
Dummy 0
Data From
Address 000
Data From
Address 001
Data From
Address 1FE
Data From
Address 1FF
2024 ILL12.0
FIGURE 16. DD CIRCUIT 4 TIMING SEQUENCE DIAGRAM
2024 9.0 8/8/00
15
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