S3C9454B View Datasheet(PDF) - Samsung
Part Name
Description
MFG CO.
'S3C9454B' PDF : 199 Pages View PDF
S3C9454B/F9454B
CONTROL REGISTERS
ADCON — A/D Converter Control Register
F7H
Bit Identifier
RESET Value
Read/Write
.7
.6
.5
.4
.3
.2
.1
.0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
.7–.4
A/D Converter Input Pin Selection Bits
0 0 0 0 ADC0 (P0.0)
0 0 0 1 ADC1 (P0.1)
0 0 1 0 ADC2 (P0.2)
0 0 1 1 ADC3 (P0.3)
0 1 0 0 ADC4 (P0.4)
0 1 0 1 ADC5 (P0.5)
0 1 1 0 ADC6 (P0.6)
0 1 1 1 ADC7 (P0.7)
1 0 0 0 ADC8 (P2.6)
1 0 0 1 Connected with GND internally
1 0 1 0 Connected with GND internally
1 0 1 1 Connected with GND internally
1 1 0 0 Connected with GND internally
1 1 0 1 Connected with GND internally
1 1 1 0 Connected with GND internally
1 1 1 1 Connected with GND internally
.3
End-of-Conversion Status Bit
0 A/D conversion is in progress
1 A/D conversion complete
.2–.1
Clock Source Selection Bit (note)
0 0 fOSC/16 (fOSC ≤ 10 MHz)
0 1 fOSC/8 (fOSC ≤ 10 MHz)
1 0 fOSC/4 (fOSC ≤ 10 MHz)
1 1 fOSC/1 (fOSC ≤ 4 MHz)
.0
Conversion Start Bit
0 No meaning
1 A/D conversion start
NOTE: Maximum ADC clock input = 4 MHz.
4-5
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