S5PV210 View Datasheet(PDF) - Samsung
Part Name
Description
MFG CO.
'S5PV210' PDF : 84 Pages View PDF
SMDK-V210_USER’S MANUAL_REV 0.0
4.1 PLL CLOCK SOURCE SELECTION
Main input clock for the S5PV210 system can be selected by setting the XOM[0] values.
Description
24MHz X-tal Clock (XXTI)
24MHz X-tal Clock (XusbXTI)
CFG4[1] , (XOM[0])
OFF
ON (default)
4.2 BOOT MODE SELECTION
4.2.1 Switch Configuration
CFG4[6]
Description
CFG4[5:2]
CFG4[6]
eSSD
Nand 2KB, 5cycle
(Nand 8bit ECC)
Nand 4KB, 5cycle
(Nand 8bit ECC)
Nand 4KB, 5cycle
(Nand 16bit ECC)
OnenandMux
I-ROM
Booting
sequence:
Storage
OnenandDemux
SD/MMC
OFF
eMMC(4-bit)
CFG4[6:2]
CFG4[5] CFG4[4] CFG4[3] CFG4[2]
OFF
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
I-ROM
Booting
sequence:
Reserved
Nand 2KB, 4cycle
(Nand 8bit ECC)
NOR boot
eMMC(8-bit)
eSSD
Nand 2KB, 5cycle
ON
OFF
ON
ON
OFF
OFF
ON
ON
ON
OFF
OFF
OFF
OFF
ON
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