SC120
Applications Information
Detailed Description
The SC120 is a synchronous step-up Pulse Width
Modulated (PWM) DC-DC converter utilizing a 1.2MHz
fixed frequency current mode architecture. It is designed
to provide output voltages in the range 1.8V to 5.0V from
an input voltage as low as 0.7V, with a (output unloaded)
start up input voltage of 0.85V.
The device operates in two modes: PWM and automatic
PSAVE mode. In PWM operation, the devices uses pulse
width modulation control to regulate the output under
moderate to heavy load conditions. It switches to PSAVE
mode when lightly loaded. Quiescent current consump-
tion is as little as 50μA, into the OUT pin, when in PSAVE
mode.
to ground and is increasing. When the n-channel FET is
turned off and the p-channel FET is turned on (known as
the off-state), the inductor is then connected between IN
and OUT. The (now decreasing) inductor current flows
from the input to the output, boosting the output voltage
above the input voltage.
Output Voltage Selection
The SC120 output voltage can be programmed to an
internally preset value or it can be programmed with
external resistors. The output is internally programmed
to 3.3V when the FB pin is connected to GND. Any output
voltage in the range 1.8V to 5.0V can be programmed
with a resistor voltage divider between OUT and the FB
pin as shown in Figure 1.
The regulator control circuitry is shown in the Block
Diagram. It is comprised of a programmable feedback
controller, an internal 1.2MHz oscillator, an n-
channel Field Effect Transistor (FET) between the LX and
GND pins, and a p-channel FET between the LX and OUT
pins. The current flowing through both FETs is monitored
and limited as required for startup, PWM operation, and
PSAVE operation. An external inductor must be connected
between the IN pin and the LX pin. When the n-channel
FET is turned on, the LX pin is internally grounded, con-
necting the inductor between IN and GND. This is called
the on-state. During the on-state, inductor current flows
The values of the resistors in the voltage divider network
are chosen to satisfy the equation
VOUT
1.2
u
¨¨©§1
R1
R2
¸¸¹·
V
.
A large value of R , ideally 590kΩ or larger, is preferred for
2
stability for V within approximately 400mV of V . For
IN
OUT
lower V , lower resistor values can be used. The values of
IN
R and R can be as large as desired to achieve low quies-
1
2
cent current.
L1
IN
LX
EN
OUT
VOUT
R1
CFB
CIN
GND
FB
COUT
SC120
R2
Figure 1 — Output Voltage Feedback Circuit
20