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SC1211 View Datasheet(PDF) - Semtech Corporation

Part Name
Description
MFG CO.
'SC1211' PDF : 11 Pages View PDF
1 2 3 4 5 6 7 8 9 10
SC1211
POWER MANAGEMENT
Applications Information
THEORY OF OPERATION
simultaneously or shoot-through.
The SC1211 is a high speed, Combi-SenseTM, dual out- Minimum Off-Time for Bottom Gate
put driver designed to drive top and bottom MOSFETs in
a synchronous Buck converter. It features adaptive de- During a load transient of the voltage regulator, the PWM
lay for shoot-through protection and VID-on-Fly opera- controller could generate a very narrow pulse for the
tion; internal LDO for optimum gate drive voltage; and driver SC1211. The pulse is so narrow that it reaches
Virtual Phase Node for Combi-SenseTM solution. These the rising edge threshold of the SC1211 at one point
drivers combined with PWM controller SC2643VX form then immediately falls below the falling edge threshold.
a multi-phase voltage regulator for advanced micropro- To response such a PWM input, the bottom gate of the
cessors. A three-phase voltage regulator with 12V input SC1211 has to pull down and pull up almost simulta-
60A output is shown in the Typical Application Circuit sec- neously, resulting in a voltage spike at the BG pin. The
tion.
spike could exceed the gate voltage rating and damage
the gate. To prevent such fast gate transition, a mini-
Startup and UVLO
mum off-time (typically 75ns) for the bottom gate is de-
signed in the SC1211. When the PWM input reaches
To startup the driver, a supply voltage is applied to VIN the rising edge threshold of the SC1211, the bottom
pin of the SC1211. The top and bottom gates are held gate pulls low and will stay low for the minimum off-time
low until VIN exceeds UVLO threshold of the driver, typi- no matter what the PWM input at the CO pin is.
cally 4.0V. Then the top gate remains low and the bot-
tom gate is pulled high to turn on the bottom FET. Once VID-on-Fly Operation
VIN exceeds UVLO threshold of the PWM controller, typi-
cally 7.5V, the soft-start begins and the PWM signal takes Certain new processors have required to changing the
fully control of the gate transitions.
VID dynamically during the operation, or refered as VID-
on-Fly operation. A VID-on-Fly can occur under light load
Gate Transition and Shoot through Protection or heavy load conditions. At light load, it could force the
converter to sink current. Upon turn-off of the top FET,
Refer to the Timing Diagrams section, the rising edge of the reversed inductor current has to be freewheeling
the PWM input initiates the bottom FET turn-off and the through the body diode of the top FET instead of the
top FET turn-on. After a short propagation delay (tPDL_BG), bottom FET. As a result, the phase node voltage remains
the bottom gate begins to fall (tF_BG). An adaptive circuit high. The SC1211 incorporates the ability by pulling the
in the SC1211 monitors the bottom gate voltage to drop bottom gate to high internally, which over rides the adap-
below 1.4V. Then after a preset delay time (tPDH_TG) is tive circuit and turns the bottom FET on. The delay time
expired, the top gate turns on. The delay time is set to from the PWM falling egde to the bottom gate turn-on is
be 20ns typically. This prevents the top FET from turning set at 200ns typically.
on until the bottom FET is off. During the transition, the
inductor current is freewheeling through the body diode Virtual Phase Node for Combi-SenseTM
of either bottom FET or top FET, upon the direction of
the inductor current. The phase node could be low Peak-Current-Mode control is widely employed in multi-
(ground) or high (VIN).
phase voltage regulators. It features phase current bal-
ance, fast transient response, and over current protec-
The falling edge of the PWM input controls the top FET tion, etc. These are essential to low-voltage high-cur-
turn-off and the bottom FET turn-on. After a short propa- rent regulators designed for advanced microprocessors.
gation delay (tPDL_TG), the top gate begins to fall (tF_TG). Usually, a costly current sensing resistor is required to
As the inductor current is commutated from the top FET obtain the output inductor current information for the
to the body diode of the bottom FET, the phase node peak current control. The Combi-SenseTM technique fea-
begins to fall. The adaptive circuit in the SC1211 de- tured by the SC1211 is an approach to sense inductor
tects the phase node voltage. It holds the bottom FET current without using sensing resistor.
off until the phase node voltage has dropped below 1.0V.
This prevents the top and bottom FETs from conducting
2003 Semtech Corp.
8
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