SC122 View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
'SC122' PDF : 13 Pages View PDF
SC122
Applications Information
Detailed Description
The SC122 is a synchronous step-up hysteretic DC-DC
converter utilizing a 1.2MHz fixed frequency switching
architecture. It provides a fixed 3.3V output from an input
voltage as low as 0.7V, with an unloaded startup input
voltage of 0.85V.
The SC122 operates exclusively in PSAVE regulation mode
(bursts of switching boost cycles, alternating with periods
of an output-high-impedance state). It has quiescent
current consumption as little as 40μA into the OUT pin. It
features anti-ringing circuitry for reduced EMI in noise
sensitive applications. The boost cycles can be disabled
with an active-high enable input. While disabled, the
output remains in a high impedance state to preserve the
charge on the output capacitor. This permits ultra-low
idle quiescent currents in applications in which the SC122
can be periodically enabled by an external controller to
recharge the output capacitor.
The regulator control circuitry is shown in the Block
Diagram. It is comprised of a feedback controller, an inter-
nal 1.2MHz oscillator, an n-channel Field Effect Transistor
(FET) between the LX and GND pins, and a p-channel FET
between the LX and OUT pins. The current flowing through
both FETs is monitored and limited as required for startup
and PSAVE regulator operation. An external inductor must
be connected between the IN pin and the LX pin.
During the burst phase of PSAVE operation, the controller
alternates between the on-state and the off-state. During
the on-state the n-channel FET is turned on, grounding the
inductor at the LX pin. This causes the current flowing from
the input supply through the inductor to ground to ramp
up. The on-state continues until the first of two limits is
reached, either the n-channel current limit I , or the on-
LIM(N)
time limit T = 0.9 × 1/f . Then during the off-state,
ON-MAX
OSC
the n-channel FET is turned off and the p-channel FET is
turned on, connecting the inductor between IN and OUT.
The (now decreasing) inductor current flows from the input
to the output, transferring the inductor energy to the
output and boosting the output voltage above the input
voltage for the remainder of the cycle period T = 1/f . The
OSC
cycle then repeats to re-energize the inductor.
The burst phase continues until V reaches an upper
OUT
voltage threshold, at which point both FETs are turned off.
This begins the high-impedance phase. The output
capacitor then discharges into the load until V reaches
OUT
a lower voltage threshold, which initiates a new burst
phase. The upper and lower voltage thresholds differ by
approximately 50mV, and were chosen to provide an
average output voltage of 3.3V. The time between bursts
is determined by the discharge rate of the output capaci-
tor, which depends on the value of output capacitance
and the magnitude of the applied load. Figure 1 illus-
trates PSAVE regulation.
V = 1.5V, I = 20mA
IN
OUT
VOUT ripple
(50mV/div)
I
L
(100mA/div)
V
LX
(5V/div)
Time = (10μs/div)
Figure 1 — PSAVE Regulation Waveforms
The Enable Pin
The EN pin is a high impedance logical input that can be
used to enable or disable the SC122 under processor
control. VEN > 0.4V will enable the output. The startup
sequence from the EN pin is identical to the startup
sequence from the application of input power.
V < 0.1V will disable regulation and set the LX pin in a
EN
high-impedance state (turn off both FET switches). The
OUT pin is also left in a high-impedance state when dis-
abled. The SC122 can be disabled while maintaining the
output voltage on the output capacitor, for the lowest
possible quiescent current, while supporting a low appli-
cation idle state load. The SC122 can then be periodically
re-enabled for a brief time to refresh the charge held on
the output capacitor, then disabled for an extended time
as determined by the discharge rate of the output capaci-
tor while supplying the idle-state load current. For
V > V , and over the full specified temperature
IN
IN-Restart
range, regulation will be fully enabled within 300μs of a
high voltage on the EN pin with V discharged to as low
OUT
as 2.5V.
9
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