SC1406G View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
SC1406G
Semtech Corporation
'SC1406G' PDF : 28 Pages View PDF
SC1406G
POWER MANAGEMENT
The 55nS maximum delay from CO to the turn-off of the high-
side driver will result in somewhat larger than calculated ripple,
especially at high line, high ESR, and low inductor values. For
the example, the increase in output ripple is about 6mV. R1 can
be adjusted for this, if desired.
Once the design is complete, rerun the calculations for 1.35V to
be sure the low voltage requirements are being met.
Several small capacitors are required for signal filtering. Use
SMT ceramic capacitors with an X7R or better temperature
coefficient. C0G is preferred.
C6 and C7, which filter the output voltage feedback, are sized
to provide filtering beyond the fifth harmonic of the fundamen-
tal. The R5/R6 and C5/C6 components are balanced differen-
tial pairs that effectively filter both common-mode and differen-
tial noise sources that are troublesome in any high-performance
switching converter:
1
R. C6MAX:= 2⋅Π ⋅RCORE ⋅FS⋅5
C6MAX= 1.061 × 10− 10 F
Occasionally, due to layout-dependent noise on the CMP pin, the
value of C6 and C7 must be increased. If multiple high fre-
quency pulses are seen on the CO pin (pin 23), then additional
capacitance is required. An additional capacitor is tied from the
CO pin to the CMPREF pin to provide AC hysteresis during
switching, and also helps to eliminate multiple pulses. Use a
1pF NPO capacitor for this purpose.
ments sized for the required currents: 2.5A peak @ 1.5V, and
150mA peak @ 2.5V.
PNP regulators are somewhat harder to stabilize than NPN
regulators. They require low source impedance,
with input decoupling <0.5 inches from the emitter of the pass
element; one capacitor suffices if the pass elements are close
enough together. The size of capacitor required varies according
to the impedance back to the 3.3V source. If the bulk
decoupling is within two inches, and the 3.3V is distributed
using a trace of at least 1 inch in width, then a 22mF capacitor
is sufficient. Otherwise, use at least 100mF. PNP regulators
generally require some ESR in the output capacitors for stability
purposes, but excess ESR can also create problems. The
allowable range of output capacitor and ESR values, based on
simulation and testing is shown in Figure 4 for the 1.5V output
and Figure 5 for the 2.5V output.
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Figure 4 - Recommended output C and ESR values (1.5V
output)
C5 is sized similarly, using R3 and R4. Since the current-limit
comparator does not affect the normal operation of the
converter, the frequency requirement is only to the second
harmonic, so as not to attenuate the fundamental.
1
( ) S. C5MAX:= 2⋅Π ⋅ RCORE + RBAL ⋅FS⋅2
C5MAX= 1.326 × 10− 10 F
The DAC output requires a similar 1nF, X7R or C0G capacitor
(C9) for high frequency noise filtering.
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Powering the SC1406:
Figure 5 - Recommended output C and ESR values (2.5V
output)
Vcc to the SC1406 can be either 5V, or 3.3V +/- 10%. 3.3V is
recommended for lower power consumption, and because the
UVLO function of the SC1406G provides protection for LDO
outputs. Filter Vcc with an RC network; R18 should be 10W,
C8, 0.1uF or greater.
Linear Regulator Design:
The SC1406G includes two linear regulator controllers, preset to
1.5V (VI/O) and 2.5V (VCLK), and sized to drive PNP pass ele-
Pass Elements:
The last thing to consider is the pass elements themselves. The
drivers are sized to provide peak output current with a minimum
beta of 50. The MMBT4403 is one choice for the 2.5V pass
element, and the MJD45H11 for the 1.5V output, although
there are many acceptable choices. Do not use a Darlington
transistor; the high gain and extra poles create stability prob-
lems, and defeat the beta current limiting scheme.
ã 2000 Semtech Corp.
17
www.semtech.com
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