SC2450ISWTR View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
'SC2450ISWTR' PDF : 20 Pages View PDF
SC2450
POWER MANAGEMENT
Control Loop Design
R2
R1
0
Gpwm
Error-Amp
-
Verror
Duty
L
+
R
+
Vbg
-
C
+
Vin
-
Rc
Ro
Co
0
0
0
0
Fig. 1. SC2450 control model.
The control model of SC2450 can be depicted in Fig. 1.
This model can also be used in Spice kind of simulator to
generate loop gain Bode plots. The bandgap reference
is 1 V and trimmed to +/-1% accuracy. The desired
output voltage can be achieved by setting the resistive
divider network, R1 and R2.
The error amplifier is transconductance type with fixed
gain of:
GERROR
:
=
0.002
A
V
The compensation network includes a resistor and a ca-
pacitor in series, which terminates from the output of
the error amplifier to the ground.
The task here is to properly choose the compensation
network for a nicely shaped loop-gain Bode plot. The
following design procedures are recommended to accom-
plish the goal:
(1) Calculate the corner frequency of the output filter:
FO
:=
2•
π•
1
L
• CO
(2) Calculate the ESR zero frequency of the output filter
capacitor:
Fesr
:=
1
2 • π •RC
• CO
(3) Check that the ESR zero frequency is not too high.
Fers
<
FSW
5
If this condition is not met, the compensation structure
may not provide loop stability. The solution is to add
some electrolytic capacitors to the output capacitor bank
to correct the output filter corner frequency and the ESR
zero frequency. In some cases, the filter inductance may
also need to be adjusted to shift the filter corner fre-
quency. It is not recommended to use only high frequency
multi-layer ceramic capacitors for output filter.
This device uses voltage mode control with input voltage
feed forward. The peak-to-peak ramp voltage is propor-
tional to the input voltage, which results in an excellent
performance to reject input voltage variation. The PWM
gain is inversion of the ramp amplitude, and this gain is
given by:
GPWM
:
=
1
VRAMP
where the ramp amplitude (peak-to-peak) is 3 volts when
input voltage is 24 volts.
The total control loop-gain can then be derived as
follows:
T( s)
T o.
1 s.R.C
s. R. C
.
1
1 s.R c.C o
s. R c.C o
L
Ro
s2.L.C o. 1
Rc
Ro
where
To
.. ..
G error.Vin.G pwm .R .
R2
R1 R2
(4) Choose the loop gain cross over frequency (0 dB fre-
quency). It is recommended that the crossover frequency
is always less than one fifth of the switching frequency
or the output ripple frequency in bi-phase mode opera-
tion:
FX _ OVER
≤
FSW
5
If the transient specification is not stringent, it is better
to choose a crossover frequency that is less than one
tenth of the switching frequency for good noise immu-
nity. The resistor in the compensation network can then
be calculated as:
R
1
.
F esr
2
.
F x_over
.
Vo
G pwm.V in.G error F o
F esr V bg
when:
F o < F esr< F x_over
2007 Semtech Corp.
16
www.semtech.com
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