SC4541
Applications Information ( continued)
PCB Layout Considerations
Poor layout can degrade the performance of the DC-DC
converter and can be a contributory factor in EMI prob-
lems, ground bounce, thermal issues, and resistive
voltage losses. Poor regulation and instability can result.
A typical application schematic is shown in Figure 1. A
typical PCB layout is shown in Figure 4.
The following design rules are recommended:
•• Place the inductor and filter capacitors as close
to the device as possible and use short, wide
traces between the power components.
•• Use a ground plane to further reduce noise
interference on sensitive circuit nodes.
VIN (5V)
R5
L1
10μH
C3
1μF
16V
10KΩ
U1
IN
EN
SC4541
GND
OUT
SW
FB
EDP
PWM(300Hz, 3.3V)
C2
1μF
35V
R1
10Ω
VOUT
LED1
LED2
LED3
L1: MURATA LQH3NPN100NM0 (10μH/ 550mA/ 3x3x1.4(mm)
LED4
C2: MURATA GRM188R7YA105K(1μF/ X7R/ 35V/ 0603)
LED5
C3: MURATA GRM188R71C105K(1μF/ X7R/ 16V/ 0603)
EfficLieEnDc1y Btoo6os: tE_vIoeurtlight 12-21C/T3D-CP1Q2B12Y/2C
Efficiency BoLoEsDt_6Vout
Figure 1 — Typical Application Schematic, Boost Topology
85%
5Vin, 10uH(A915AY-100M)
80%
75%
70%
3S1P
65%
4S1P
60%
5S1P
6S1P
55%
7S1P
8S1P
50%
0 3 5 8 10 13 15 18 20
Iout(mA)
82%
80%
10uH(A915AY-100M)
78%
76%
74%
72%
5Vin
3.6Vin
70%
8 10 12 14 16 18 20 22 24 26
Vout(V)
12