SC4607IMSTRT View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
'SC4607IMSTRT' PDF : 17 Pages View PDF
SC4607
POWER MANAGEMENT
Application Information (Cont.)
bottom MOSFET, its switching voltage is the body diode’s
forward drop of the bottom MOSFET during its on/off
transition. So the switching loss for the bottom MOSFET
is negligible. Its total power loss can be determined by:
voltage according to
Vout
=
0.5 ⋅ (1+
R7 )
R9
PBOT _ TOTAL
=
I2
BOT _ RMS
⋅ RBOT _ ON
+ QGB ⋅ VGATE
⋅ fs
+ ID _ AVG ⋅ VF
BST
VCC
DRVH
PHASE
ISET
DRVL
Where:
C OMP
GND
Q = the total gate charge of the bottom MOSFET and
GB
C1 C2
FS/SY NC VSENSE
VF = the forward voltage drop of the body diode of the
bottom MOSFET.
SC4607
R1
L1
Vout
C9
R7 C4
R
R8
For a low voltage and high output current application such
as the 3.3V/1.5V@12A case, the conduction loss is of-
ten dominant and selecting low RDS(ON) MOSFETs will no-
ticeably improve the efficiency of the converter even
though they give higher switching losses.
The gate charge loss portion of the top/bottom MOSFET’s
total power loss is derived from the SC4607. This gate
charge loss is based on certain operating conditions (f ,
s
VGATE, and IO).
The thermal estimations have to be done for both
MOSFETs to make sure that their junction temperatures
do not exceed their thermal ratings according to their
total power losses PTOTAL, ambient temperature TA and their
thermal resistance RθJA as follows:
TJ(max)
<
TA
+
PTOTAL
RθJA
Loop Compensation Design:
For a DC/DC converter, it is usually required that the
converter has a loop gain of a high cross-over frequency
for fast load response, high DC and low frequency gain
for low steady state error, and enough phase margin for
its operating stability. Often one can not have all these
properties at the same time. The purpose of the loop
compensation is to arrange the poles and zeros of the
compensation network to meet the requirements for a
specific application.
The SC4607 has an internal error amplifier and requires
the compensation network to connect among the COMP
pin and VSENSE pin, GND, and the output as shown in
Figure 5. The compensation network includes C1, C2,
R1, R7, R8 and C9. R9 is used to program the output
Figure 4. Compensation network provides 3 R9
poles and 2 zeros.
Figure 5. Compensation network provides 3 poles and
2 zeros.
For voltage mode step down applications as shown in
Figure 5, the power stage transfer function is:
1+
s
1
GVD (s)
=
VI
1+
s
RC
L1
R
+
⋅ C4
s2L1C4
Where:
R = load resistance and
RC = C4’s ESR.
The compensation network will have the characteristic
as follows:
Where
1+ s 1+ s
GCOMP (s) =
ωI
s
⋅
1+
ωZ1
s
⋅
⋅1+
ωZ2
s
ωP1
ωP2
1
ωI = R7 ⋅ (C1 + C2 )
1
ωZ1 = R1 ⋅ C2
1
ωZ2 = (R7 + R8 ) ⋅ C9
2005 Semtech Corp.
12
www.semtech.com
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