SC480
PPOOWWEERR MMAANNAAGGEEMMEENNTT
Application Information (Cont.)
We will select an inductor value of 1.5μH to reduce the where ERRTR is the transient output tolerance. For this
ripple current, which can be calculated as follows:
case, ITRANS is the load transient of 5A (10A - 5A).
I RIPPLE_VBAT(MIN)
©¨§ VBAT (MIN) V OUT ¹¸· x
tON_ VBAT ( MIN )
L
AP P
and,
I RIPPLE_VBAT(MAX )
©¨§ VBAT (MAX ) V OUT ¹¸· x
tON_ VBAT ( MAX )
L
AP P
For our example:
IRIPPLE_VBAT(MIN) = 3.39AP-P and IRIPPLE_VBAT(MAX) = 4.34AP-P
From this we can calculate the minimum inductor current
rating for normal operation:
I INDUCTOR ( MIN )
IOUT (MAX )
I RIPPLE_VBAT ( MAX )
2
A (MIN)
For our example:
I
INDUCTOR(MIN)
=
12.2A(MIN)
Next we will calculate the maximum output capacitor
equivalent series resistance (ESR). This is determined by
calculating the remaining static and transient tolerance
allowances. Then the maximum ESR is the smaller of the
calculated static ESR (RESR_ST(MAX)) and transient ESR
(RESR_TR(MAX)):
RESR _ ST (MAX )
ERR ST ERRDC
x2
Ohms
I RIPPLE _ V BAT (MAX)
Where ERRST is the static output tolerance and ERRDC is
the DC error. The DC error will be 1% plus the tolerance
of the internal feedback. (Use 2% for external feedback,
which is 1% plus another 1% for the external resistors.)
For our example:
ERRST = 36mV and, ERRDC = 18mV, therefore,
RESR_ST(MAX) = 8.3mΩ
R ESR_ TR (MAX)
©¨§ ERRTR ERRDC ¹¸·
©¨¨§ I TRANS
IRIPPLE_VBAT(
2
MAX
)
¸·
¹¸
Ohms
For our example:
ERRTR = 144mV and ERRDC = 18mV, therefore,
RESR_TR(MAX) = 17.6mΩ for a full 5A load transient.
We will select a value of 6mΩ maximum for our design,
which would be achieved by using two 12mΩ output ca-
pacitors in parallel. Now that we know the output ESR we
can calculate the output ripple voltage:
V RIPPLE_VBAT ( MIN) RESR x IRIPPLE_VBAT (MIN)VPP
and,
V RIPPLE_VBAT ( MAX ) RESR x IRIPPLE_VBAT (MAX )VPP
For our example:
VRIPPLE_VBAT(MAX) = 20mVP-P and VRIPPLE_VBAT(MIN) = 26mVP-P
Note that in order for the device to regulate in a controlled
manner, the ripple content at the feedback pin, VFB, should
be approximately 15mVP-P at minimum VBAT, and worst case
no smaller than 10mVP-P. Note that the voltage ripple at
FB is smaller than the voltage ripple at the output capaci-
tor, due to the resistor divider. Also, when using internal
feedback (FB pin tied to 5V or GND), the FB resistor di-
vider is actually inside the IC. If VRIPPLE_VBAT(MIN) as seen at
the FB point is less than 15mVP-P - whether internal or ex-
ternal FB is used - the above component values should be
revisited in order to improve this. For our example, since
the internal divider reduces the ripple signal by a factor of
(1.5V/1.8V), the internal FB ripple values are then 17mV
and 22mV, which is above the 15mV minimum.
When using external feedback, and with VDDQ greater
than 1.5V, a small capacitor, CTOP, can be used in parallel
with the top feedback resistor, RTOP, in order to ensure that
ripple at VFB is large enough. C should not be greater
TOP
than 100pF. The value of CTOP can be calculated as fol-
lows, where RBOT is the bottom feedback resistor. Firstly
calculating the value of ZTOP required:
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