SC5010HULTRT View Datasheet(PDF) - Semtech Corporation

Part Name

Description

MFG CO.

SC5010HULTRT

High Efficiency 8-Channel LED Driver with I2C Interface and Phase-Shifted PWM Dimming

Semtech Corporation 

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SC5010H

Applications Information (continued)

Optional Synchronization to SYNC Input

The SC5010H provides an option to synchronize the LED

dimming to an external clock source connected to the

SYNC pin. In certain applications, it may be beneficial to

synchronize the LED drive signal to the LCD screen refresh

signals such as VSYNC or HSYNC. This helps reduce or

eliminate some of the problems associated with using LED

backlights, such as flickering, shimmering, etc.

The phase lock loop available on the SC5010H can be pro-

grammed via I2C to synchronize the internal 10MHz oscil-

lator to the SYNC input. Figures on page 11 show

synchronization of SC5010H to a 48kHz HSYNC signal

applied on SYNC pin. The turn-on of the LED string IO1

(falling edge of VIO1) is synchronized to the rising edge of

the HSYNC input. The turn-on of rest of the strings will be

delayed based on the phase shifting algorithm. Another

figure shows the delay (~500ns) between HSYNC rising

edge and turn-on of the LED string 1 (IO1).

Input Disconnect

The SC5010H incorporates a high voltage (up to 27V) p-

MOSFET gate driver which can be used for controlling an

external p-channel MOSFET. The external p-channel

MOSFET provides load disconnection during shutdown or

fault mode. It also provides input inrush current limiting

during start-up. During shutdown, the DRVP pin is pulled

up to VIN voltage via an internal 1MΩ resistor. At startup,

the boost converter is held off and the DRVP pin is pulled

low via an internal 20µA (typ) current source. When the

DRVP pin is pulled lower than the threshold voltage of the

Vin

(4.5-27V)

PGND

Vcc (5V)

AGND

C1

R2

C2

2 .2 µF

R1

Q2

L1

C7

C8

D1

L2

Q1

R9

0.1Ω

U1 28 27 26 25 24 23 22

R11

C6

R10

R3

R4

R5

C3

1 µF

R6

R15

1 VCC

2 EN

3 UVLO

4

SCP

5 BG

6

FSET

7

AGND

S C 5010H

IO2 21

IO3 20

IO4 19

18

IO5

IO6 17

IO7 16

15

IO8

8

R7

C4

C5

9 10 11 12 13 14

THP

PAD

R8

Vout

SYNC SCL SDA

FLT PWMI

Figure 3 — SEPIC Configuration

22

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