SC5014 View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
SC5014
Semtech Corporation
'SC5014' PDF : 34 Pages View PDF
SC5014
Applications Information (continued)
(2) PWM Indirect Control
This is the default mode for LED PWM dimming in the
SC5014. In this mode, the input signal applied on the PWM
pin is passed through a duty cycle extractor block after the
system has detected two successive duty cycles that are the
same. The extractor measures the duty cycle of the PWM
input, and, depending on the value of FAST_FREQ, the duty
cycle is converted to a 9-bit value (FAST_FREQ = 1) or a 10-
bit value (FAST_FREQ = 0). This value is then passed to the
PWM generator block as shown in Figure 1.
should be connected to ground. In this mode, the LED
dimming duty cycle is set via the duty cycle registers
(addresses 0x03, 0x04); and the dimming frequency is set
via the FREQ register (address 0x05) and the FAST_FREQ
bit.
With FAST_FREQ = 0, the LED duty cycle can achieve 10-bit
resolution, D[9:0], which is combined by two portions: (1)
MSB portion - register address 0x03 [1:0] and (2) LSB portion
- register address 0x04 [7:0] as shown below.
The LED PWM output frequency is set via the FREQ regis-
ter (address 0x05) and the FAST_FREQ bit.
With FAST_FREQ = 0, low dimming frequency option is
selected and the PWM dimming frequency will be accord-
ing to the following equation:
PWM Dimming Frequency =
10MHz
1024 × [FREQ[7 : 0] + 1]
= 10kHz(max)
With FAST_FREQ = 1, the high dimming frequency option
is selected and the PWM dimming frequency is shown by
the following equation:
PWM Dimming Frequency =
10MHz
512 × [FREQ[7 : 0] + 1]
= 20kHz(max)
The default option is FAST_FREQ = 1. This gives 9-bit duty
cycle resolution and up to 20kHz dimming frequency
range. The PWM input is usually generated by the system
graphics processor. This mode allows the user to set the
PWM output dimming frequency independent of the
PWMI input.
The dimming duty cycle with FAST_FREQ = 0 can be calcu-
lated as:
LED Dimming Duty Cycle = {D[9:0]decimal }/210-1
With FAST_FREQ = 1, the LED duty cycle can achieve 9-bit
resolution, D[9:1], which is combined by two portions: (1)
MSB portion - register address 0x03 [1:0] and (2) LSB portion
- register address 0x04 [7:1] as shown below.
The dimming duty cycle with FAST_FREQ = 1 can be calcu-
lated as:
If the PWM signal has jitter, the SC5014 provides an option
to filter it out. Hysteresis is also provided by selecting the
WND[1:0] bits in the DCR register (address 0x01). WND[1:0]
bits set the window comparator such that if a change in
the duty cycle is detected which is smaller than the set
window, then it is ignored.
(3) I2C Control
In I2C dimming mode (refer to Figure 1, page 14), both the
output LED dimming duty cycle and the dimming fre-
quency are set via the internal registers. The PWMI pin
LED Dimming Duty Cycle = {D[9:1]decimal }/29-1
In both cases mentioned above, the duty cycle is fixed to be
0 when D[9:0] is set as 0x00.
The PWM dimming frequency is controlled the same way as
in “Indirect Control”.
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