SC900
POWER MANAGEMENT
Applications Information (Cont.)
Layout Considerations
Layout is straightforward if you use the Gerber files on
page 21 as a reference. Notice that the input voltage
feed to the SC900 is on the bottom of the board and
vias connect this voltage track to the top of the board
and then to the SC900 itself. The input bypass can be
one 4.7µF capacitor, two 3.3µF capacitors, three 2.2µF
capacitors or five 1µF capacitors. The determining fac-
tor is how much copper is available on the input voltage
feed track and how much room is available. If the input
voltage track is very thin, then use five 1µF capacitors
placed very close to the input pins of the SC900. If the
input track is fairly thick, then you can use a single 4.7µF
capacitor at the beginning of the voltage feed track since
a wider track has less inductance per inch. The
SC900EVB has five 1µF capacitors, but these can be
replaced with one 4.7µF in place of C1 and opens in
place of C9, C14, C15, and C16 (see page 20 for de-
tails).
LDO Reset Control Logic Table (Defaults are in Bold)
Register
Name
LDO A
LDO B
LDO C
LDO D
LDO E
LDO Reset
Control
On/Off Control
Register
Register
Address
0x00
0x01
0x02
0x03
0x04
0x05
0x06
Bit 7
X
Bit 6
X
Bit 5
Active
Shutdown
1 = ON
0 = OFF
Bit 4
Bit 3
Bit 2
Bit 1
LDO Output Voltage Codes
Table A
Bit 0
LDOPGD Pin
ARST Pin
Reset Polarity Bit Reset Polarity Bit
X
X
LDOPGD Monitor Logic Bits
LDOPGD Delay Bits
LDO (A) Reset Delay Bits
X
ON/OFF Control ON/OFF Control ON/OFF Control ON/OFF Control ON/OFF Control
LDO E
LDO D
LDO C
LDO B
LDO A
1
0
1
0
1
0
1
0
1
0
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
LDO Reset Control Logic Table (Defaults are in Bold)
Bit 7
Result
Bit 6
Result
Bit 5
Bit 4
Result
Bit 3
Bit 2
LDOPGD Pin Polarity ARST Pin Polarity
0
High: Power Fail
Low: Power Good
0 High: Reset
Low: Power Good
LDOPGD Monitor Logic
0
0
LDOs
A,C,D&E
Good
LDOPGD Delay
0
0
1 High: Power Good
1 High: Power Good
0
Low: Power Fail
Low: Reset
1
LDO E Good
0
1
1
0
LDO C Good
1
0
1
1
LDO D Good
1
1
Result Bit 1 Bit 0 Result
ARST Delay
150ms 0
0 150ms
100ms 0
50ms
1
0ms
1
1 50ms
0 100ms
1
0ms
Notes:
Digital outputs are powered from INB, additionally LDOB must be on for operation of LDOPGD and ARST.
SC900 Slave Address:
DEVICE TYPE IDENTIFIER
0
0
0
1
0
0
DEVICE
ADDRESS
A0
R/W
X
2005 Semtech Corp.
12
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