SC905AMLTRT View Datasheet(PDF) - Semtech Corporation
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Description
MFG CO.
'SC905AMLTRT' PDF : 23 Pages View PDF
SC905A
POWER MANAGEMENT
Using the I2C Serial Port
The I2C General Specification
The SC905A is a read-write slave-mode I2C device and complies with the Philips I2C standard Version 2.1 dated January,
2000. The SC905A has eight user-accessible internal 8-bit registers. The I2C interface has been designed for program
flexibility, in that once the slave address has been sent to the SC905A enabling it to be a slave transmitter/receiver, any
register can be written or read independently of each other. While there is no auto increment/decrement capability in
the SC905A I2C logic, a tight software loop can be designed to randomly access the next register independent of which
register you begin accessing. The start and stop commands frame the data-packet and the repeat start condition is
allowed if necessary.
SC905A Limitations to the I2C Specifications
Seven bit addressing is used and ten bit addressing is not allowed. Any general call address will be ignored by the
SC905A. The SC905A is not CBUS compatible. The SC905A can operate in standard mode (100kbit/s) or fast mode
(400kbit/s).
Supported Formats
Direct Format - Write
The simplest format for an I2C write is given below. After the start condition [S], the slave address is sent, followed
by an eighth bit indicating a write. The SC905A I2C then acknowledges that it is being addressed, and the master
responds with an 8-bit data byte consisting of the register address. The slave acknowledges and the master sends
the appropriate 8-bit data byte. Once again the slave acknowledges and the master terminates the transfer with the
stop condition [P].
I2C Direct Format - Write
S Slave Address W A Register Address A
Data
AP
S: Start Condition
W: Write = ‘0’
A: Acknowledge (sent by slave)
P: Stop condition
Slave Address: 7-bit
Register Address: 8-bit
Data: 8-bit
Combined Format - Read
After the start condition [S], the slave address is sent, followed by an eighth bit indicating a write. The SC905A I2C then
acknowledges that it is being addressed, and the master responds with an 8-bit data byte consisting of the register
address. The slave acknowledges and the master sends the repeated start condition [Sr]. Once again, the slave
address is sent, followed by an eighth bit indicating a read. The slave responds with an acknowledge and the previously
addressed 8-bit data byte; the master then sends a non-acknowledge (NACK). Finally, the master terminates the
transfer with the stop condition [P].
I2C Combined Format- Read
S Slave Address W A Register Address A Sr Slave Address R A
Data
NACK P
S: Start Condition
W: Write = ‘0’
R: Read = ‘1’
A: Acknowledge (sent by slave)
NACK: Non-Acknowledge (sent by master)
Sr: Repeated Start Condition
P: Stop condition
Slave Address: 7-bit
Register Address: 8-bit
Data: 8-bit
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