SCA100T View Datasheet(PDF) - Murata Manufacturing
Part Name
Description
MFG CO.
'SCA100T' PDF : 17 Pages View PDF
SCA100T Series
1.7 Electrical Connection
If the SPI interface is not used SCK (pin1), MISO (pin3), MOSI (pin4) and CSB (pin7) must be left
floating. Self-test can be activated applying logic “1” (positive supply voltage level) to ST_1 or
ST_2 pins (pins 10 or 9). Self-test must not be activated for both channels at the same time. If ST
feature is not used pins 9 and 10 must be left floating or connected to GND. Inclination signals are
provided from pins OUT_1 and OUT_2.
SSCCKK 1
Ext_C_1 2
12 VVDDDD
11 OOUUTT_1_1
MMISIOSO 3
10 STS_T1_/1Test_in
MMOOSSI I 4
OOUUTT__22 5
GNVDSS 6
9 STS_T2_2
8 Ext_C_2
7 CCSBSB
Figure 3. SCA100T electrical connection
No.
Node
1
SCK
2
NC
3
MISO
4
MOSI
5
Out_2
6
GND
7
CSB
8
NC
9
ST_2
10
ST_1
11
Out_1
12
VDD
I/O
Input
Input
Output
Input
Output
Supply
Input
Input
Input
Input
Output
Supply
Description
Serial clock
No connect, left floating
Master in slave out; data output
Master out slave in; data input
Y axis Output (Ch 2)
Ground
Chip select (active low)
No connect, left floating
Self test input for Ch 2
Self test input for Ch 1
X axis Output (Ch 1)
Positive supply voltage (+5V DC)
1.8 Typical Performance Characteristics
Typical offset and sensitivity temperature dependencies of the SCA100T are presented in following
diagrams. These results represent the typical performance of SCA100T components. The mean
value and 3 sigma limits (mean ± 3 standard deviation) and specification limits are presented in
following diagrams. The 3 sigma limits represents 99.73% of the SCA100T population.
Murata Electronics Oy
www.muratamems.fi
Subject to changes
Doc. nr. 8261800
6/17
Rev.B2
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