Level hold melody output (LH = HIGH)
SM1350 series
STN
Melody
#N
Output
#N+1
#N+1
Note: Refer to the "TIMING DIAGRAMS" section to confirm melody timing specifics
Figure 10. Level hold mode (serial select)
S0, S1 melody output control
The melody selection in serial mode is controlled by S0 and S1 as shown in the following table. When S1 is
HIGH, S0 switches to a pull-up input configuration. The states of S0 and S1 are read in immediately after start-
up and does not change during melody output.
Table 1. S0, S1 resistor and melody counter
S0
LOW
HIGH
HIGH
S1
×
LOW
HIGH
Melody counter
Increments when melody output stops
No increment
Increments when melody output starts
STN
S1
S0
Serection
Counter
#N
#N+1
#N+2
#N+2
Melody
Output
#N
#N+1
#N+2
#N+2
Note: Refer to the "TIMING DIAGRAMS" section to confirm melody timing specifics
Figure 11. S0, S1 melody output control timing
NIPPON PRECISION CIRCUITS—12