SM5846AP_06 View Datasheet(PDF) - Nippon Precision Circuits
Part Name
Description
MFG CO.
'SM5846AP_06' PDF : 36 Pages View PDF
SM5846AP
Microprocessor Interface
Microprocessor interface pins
When MDS is LOW, the SM5846AP is controlled by internal flags set by serial data transferred over the micro-
processor interface comprising MDLE, MDCK and MDT.
Pin name
MDLE
MDCK
MDT
Function
Microprocessor data latch enable input
Microprocessor data transfer clock input
Serial data input
Internal control flag serial data on MDT is input into an internal shift register on the rising edge of MDCK.
After 8-bit data has been input, the data in the shift register is stored in one of four internal flag registers on the
rising edge of MDLE latch enable.
The address of the flag register is derived by decoding bits 1 to 3 of the 8-bit data.
Microprocessor interface
MDT
MDCK
8bit SIPO Shift Register
D
C
Q
MDLE
Decoder
8bit Register
D
C
Q
8bit Register
D
C
Q
8bit Register
D
C
Q
8bit Register
D
C
Q
D-ATT Attenation
Mode flag 1
Mode flag 2
Mode flag 3
Microprocessor interface data input timing
MDCK and MDLE can also follow the dotted lines above
MDLE
MDCK
MDT
bit1 bit2 bit3 bit4 bit5 bit6 bit7 bit8
MSB
LSB
SEIKO NPC CORPORATION —33
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